[PATCH] D48537: AMDGPU: Add pass to lower kernel arguments to loads

[Matt Arsenault via Phabricator via llvm-commits]

arsenm updated this revision to Diff 152847.
arsenm added a comment.

Add more value names


https://reviews.llvm.org/D48537

Files:
  lib/Target/AMDGPU/AMDGPU.h
  lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/AMDGPU/CMakeLists.txt
  test/CodeGen/AMDGPU/GlobalISel/smrd.ll
  test/CodeGen/AMDGPU/add_i64.ll
  test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
  test/CodeGen/AMDGPU/and.ll
  test/CodeGen/AMDGPU/ashr.v2i16.ll
  test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
  test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr-spill-to-smem.ll
  test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
  test/CodeGen/AMDGPU/basic-branch.ll
  test/CodeGen/AMDGPU/bfe-patterns.ll
  test/CodeGen/AMDGPU/bfi_int.ll
  test/CodeGen/AMDGPU/br_cc.f16.ll
  test/CodeGen/AMDGPU/branch-relaxation.ll
  test/CodeGen/AMDGPU/code-object-v3.ll
  test/CodeGen/AMDGPU/ctlz.ll
  test/CodeGen/AMDGPU/ctlz_zero_undef.ll
  test/CodeGen/AMDGPU/ctpop.ll
  test/CodeGen/AMDGPU/ctpop16.ll
  test/CodeGen/AMDGPU/ctpop64.ll
  test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
  test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
  test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
  test/CodeGen/AMDGPU/fabs.f16.ll
  test/CodeGen/AMDGPU/fabs.f64.ll
  test/CodeGen/AMDGPU/fabs.ll
  test/CodeGen/AMDGPU/fadd.f16.ll
  test/CodeGen/AMDGPU/fcmp.f16.ll
  test/CodeGen/AMDGPU/fcopysign.f16.ll
  test/CodeGen/AMDGPU/fcopysign.f32.ll
  test/CodeGen/AMDGPU/fcopysign.f64.ll
  test/CodeGen/AMDGPU/fma.ll
  test/CodeGen/AMDGPU/fmin_legacy.ll
  test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
  test/CodeGen/AMDGPU/fmul.f16.ll
  test/CodeGen/AMDGPU/fneg-fabs.f16.ll
  test/CodeGen/AMDGPU/fneg-fabs.f64.ll
  test/CodeGen/AMDGPU/fneg-fabs.ll
  test/CodeGen/AMDGPU/fneg.f64.ll
  test/CodeGen/AMDGPU/frame-index-amdgiz.ll
  test/CodeGen/AMDGPU/fsub.f16.ll
  test/CodeGen/AMDGPU/global_smrd.ll
  test/CodeGen/AMDGPU/half.ll
  test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
  test/CodeGen/AMDGPU/imm.ll
  test/CodeGen/AMDGPU/immv216.ll
  test/CodeGen/AMDGPU/insert_vector_elt.ll
  test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
  test/CodeGen/AMDGPU/kernel-args.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.format.d16.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll
  test/CodeGen/AMDGPU/llvm.ceil.f16.ll
  test/CodeGen/AMDGPU/llvm.cos.f16.ll
  test/CodeGen/AMDGPU/llvm.dbg.value.ll
  test/CodeGen/AMDGPU/llvm.floor.f16.ll
  test/CodeGen/AMDGPU/llvm.fma.f16.ll
  test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
  test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
  test/CodeGen/AMDGPU/llvm.minnum.f16.ll
  test/CodeGen/AMDGPU/llvm.rint.f16.ll
  test/CodeGen/AMDGPU/llvm.sin.f16.ll
  test/CodeGen/AMDGPU/llvm.trunc.f16.ll
  test/CodeGen/AMDGPU/load-select-ptr.ll
  test/CodeGen/AMDGPU/lower-kernargs.ll
  test/CodeGen/AMDGPU/lshr.v2i16.ll
  test/CodeGen/AMDGPU/madak.ll
  test/CodeGen/AMDGPU/madmk.ll
  test/CodeGen/AMDGPU/max.ll
  test/CodeGen/AMDGPU/min.ll
  test/CodeGen/AMDGPU/missing-store.ll
  test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll
  test/CodeGen/AMDGPU/mul.i16.ll
  test/CodeGen/AMDGPU/mul.ll
  test/CodeGen/AMDGPU/mul_int24.ll
  test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
  test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
  test/CodeGen/AMDGPU/no-shrink-extloads.ll
  test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll
  test/CodeGen/AMDGPU/operand-spacing.ll
  test/CodeGen/AMDGPU/or.ll
  test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
  test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
  test/CodeGen/AMDGPU/sad.ll
  test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
  test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
  test/CodeGen/AMDGPU/select-i1.ll
  test/CodeGen/AMDGPU/select-opt.ll
  test/CodeGen/AMDGPU/select.f16.ll
  test/CodeGen/AMDGPU/setcc-opt.ll
  test/CodeGen/AMDGPU/sgpr-control-flow.ll
  test/CodeGen/AMDGPU/shl.ll
  test/CodeGen/AMDGPU/shl.v2i16.ll
  test/CodeGen/AMDGPU/shl_add_constant.ll
  test/CodeGen/AMDGPU/sign_extend.ll
  test/CodeGen/AMDGPU/smed3.ll
  test/CodeGen/AMDGPU/sminmax.ll
  test/CodeGen/AMDGPU/sminmax.v2i16.ll
  test/CodeGen/AMDGPU/smrd.ll
  test/CodeGen/AMDGPU/sra.ll
  test/CodeGen/AMDGPU/srl.ll
  test/CodeGen/AMDGPU/store-weird-sizes.ll
  test/CodeGen/AMDGPU/sub.ll
  test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
  test/CodeGen/AMDGPU/trunc-store-i1.ll
  test/CodeGen/AMDGPU/trunc.ll
  test/CodeGen/AMDGPU/udivrem.ll
  test/CodeGen/AMDGPU/umed3.ll
  test/CodeGen/AMDGPU/unaligned-load-store.ll
  test/CodeGen/AMDGPU/uniform-cfg.ll
  test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
  test/CodeGen/AMDGPU/v_cndmask.ll
  test/CodeGen/AMDGPU/v_mac_f16.ll
  test/CodeGen/AMDGPU/v_madak_f16.ll
  test/CodeGen/AMDGPU/xor.ll
  test/CodeGen/AMDGPU/zero_extend.ll

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