[PATCH] D48128: [ARM] Parallel DSP IR Pass
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 22 11:09:57 PDT 2018
efriedma added inline comments.
================
Comment at: lib/Target/ARM/ARMParallelDSP.cpp:259
+ LLVM_DEBUG(dbgs() << "OK: loads are consecutive.\n");
+ return true;
+ }
----------------
SjoerdMeijer wrote:
> efriedma wrote:
> > Do you need to check that the memory isn't modified between the two loads?
> Yes, we check this a bit earlier with AreNoAliases() in CreateParallelMACPairs().
> The store and alias checks are tested in tests smlad6.ll and smlad7.ll, but please let me know if I've missed something here.
The AreNoAliases check only looks for "store" instructions; other instructions can write to memory. Maybe you want AliasAnalysis::getModRefInfo()?
================
Comment at: lib/Target/ARM/ARMParallelDSP.cpp:254
+
+ if (Ld0->isVolatile() || Ld1->isVolatile()) {
+ LLVM_DEBUG(dbgs() << "No, not touching volatile loads\n");
----------------
Please check isSimple() instead.
https://reviews.llvm.org/D48128
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