[PATCH] D47681: [DAGCombiner] Bug 31275- Extract a shift from a constant mul or udiv if a rotate can be formed
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 17 23:57:52 PDT 2018
lebedev.ri added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:4831-4841
+/// (or (shrl (mul v c0) c1) (mul v c2)) ->
+/// (or (shrl (mul v c0) c1) (shl (mul v c0) c3))
+//
+/// (or (udiv v c0) (shl (udiv v c1) c2)) ->
+/// (or (shrl (udiv v c1) c3) (shl (udiv v c1) c2))
+//
+/// (or (shrl (shl v c0) c1) (shl v c2)) ->
----------------
This should be:
```
// (or (shrl (mul v c0) c1) (mul v c2)) ->
// (or (shrl (mul v c0) c1) (shl (mul v c3) c4))
//
// (or (udiv v c0) (shl (udiv v c1) c2)) ->
// (or (shrl (udiv v c3) c4) (shl (udiv v c1) c2))
//
// (or (shrl (shl v c0) c1) (shl v c2)) ->
// (or (shrl (shl v c0) c1) (shl (shl v c3) c4))
//
// (or (shrl v c0) (shl (shrl v c1) c2)) ->
// (or (shrl (shrl v c1) c3) (shl (shrl v c1) c2))
//
// NEW:
// (or (shrl (shl v c0) c1) (mul v c2)) ->
// (or (shrl (shl v c0) c1) (shl (mul v c3) c4))
//
// (or (shrl v c0) (shl (div v c1) c2)) ->
// (or (shrl (shrl v c1) c3) (shl (div v c1) c2))
```
We may not always succeed in converting `mul`/`div` into a shift,
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:4842-4843
+/// (or (shrl (shrl v c1) c3) (shl (shrl v c1) c2))
+static SDValue extractShift(SelectionDAG &DAG, SDValue OppShift,
+ SDValue ExtractFrom, SDValue &Mask,
+ const SDLoc &DL) {
----------------
You want to add a comment that it will be called for both the LHS and RHS,
so it does not have to worry about looking at the other side here.
https://reviews.llvm.org/D47681
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