[PATCH] D47736: AMDHSA Code Object v3 assembler syntax update

[Konstantin Zhuravlyov via Phabricator via llvm-commits]

kzhuravl added inline comments.


================
Comment at: docs/AMDGPUUsage.rst:4367
+     ======================================================== ================ ============ ===================
+     ``.amdhsa_group_segment_fixed_size``                     0                GFX6-GFX9    Controls GroupSegmentFixedSize in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
GroupSegmentFixedSize -> GROUP_SEGMENT_FIXED_SIZE


================
Comment at: docs/AMDGPUUsage.rst:4369
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_private_segment_fixed_size``                   0                GFX6-GFX9    Controls PrivateSegmentFixedSize in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
PrivateSegmentFixedSize -> PRIVATE_SEGMENT_FIXED_SIZE


================
Comment at: docs/AMDGPUUsage.rst:4371
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_private_segment_buffer``             0                GFX6-GFX9    Controls EnableSGPRPrivateSegmentBuffer in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
EnableSGPRPrivateSegmentBuffer -> ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER


================
Comment at: docs/AMDGPUUsage.rst:4373
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_dispatch_ptr``                       0                GFX6-GFX9    Controls EnableSGPRDispatchPtr in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
EnableSGPRDispatchPtr -> ENABLE_SGPR_DISPATCH_PTR


================
Comment at: docs/AMDGPUUsage.rst:4375
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_queue_ptr``                          0                GFX6-GFX9    Controls EnableSGPRQueuePtr in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
EnableSGPRQueuePtr -> ENABLE_SGPR_QUEUE_PTR


================
Comment at: docs/AMDGPUUsage.rst:4377
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_kernarg_segment_ptr``                0                GFX6-GFX9    Controls EnableSGPRKernargSegmentPtr in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
EnableSGPRKernargSegmentPtr -> ENABLE_SGPR_KERNARG_SEGMENT_PTR


================
Comment at: docs/AMDGPUUsage.rst:4379
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_dispatch_id``                        0                GFX6-GFX9    Controls EnableSGPRDispatchID in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
EnableSGPRDispatchID -> ENABLE_SGPR_DISPATCH_ID


================
Comment at: docs/AMDGPUUsage.rst:4381
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_flat_scratch_init``                  0                GFX6-GFX9    Controls EnableSGPRFlatScratchInit in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
ditto


================
Comment at: docs/AMDGPUUsage.rst:4383
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_private_segment_size``               0                GFX6-GFX9    Controls EnableSGPRPrivateSegmentSize in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
ditto


================
Comment at: docs/AMDGPUUsage.rst:4385
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_grid_workgroup_count_x``             0                GFX6-GFX9    Controls EnableSGPRGridWorkgroupCountX in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
EnableSGPRGridWorkgroupCountX -> ENABLE_SGPR_GRID_WORKGROUP_COUNT_X

It is currently not implemented in the CP and must always be 0. What is the point of making this directive available to the user at this time?


================
Comment at: docs/AMDGPUUsage.rst:4387
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_grid_workgroup_count_y``             0                GFX6-GFX9    Controls EnableSGPRGridWorkgroupCountY in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
ditto


================
Comment at: docs/AMDGPUUsage.rst:4389
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
+     ``.amdhsa_user_sgpr_grid_workgroup_count_z``             0                GFX6-GFX9    Controls EnableSGPRGridWorkgroupCountZ in
+                                                                                            :ref:`amdgpu-amdhsa-kernel-descriptor-gfx6-gfx9-table`
----------------
ditto


================
Comment at: docs/AMDGPUUsage.rst:4393
+                                                                                            :ref:`amdgpu-amdhsa-compute_pgm_rsrc2-gfx6-gfx9-table`
+     ``.amdhsa_system_sgpr_workgroup_id_x``                   0                GFX6-GFX9    Controls ENABLE_SGPR_WORKGROUP_ID_X in
+                                                                                            :ref:`amdgpu-amdhsa-compute_pgm_rsrc2-gfx6-gfx9-table`
----------------
Should default to 1. Is it actually ok to provide this directive? amdhsa_system_sgpr_workgroup_id_x is always initialized.


https://reviews.llvm.org/D47736