[PATCH] D48131: [RISCV] Implement codegen for cmpxchg on RV32I

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

You can introduce a target-specific SelectionDAG node without adding a corresponding IR intrinsic.  See ISD::FIRST_TARGET_MEMORY_OPCODE.


https://reviews.llvm.org/D48131