[llvm] r333947 - [CodeGen] Always update divergence in SelectionDAG::UpdateNodeOperands

[Scott Linder via llvm-commits]

Author: scott.linder
Date: Mon Jun  4 13:19:45 2018
New Revision: 333947

URL: http://llvm.org/viewvc/llvm-project?rev=333947&view=rev
Log:
[CodeGen] Always update divergence in SelectionDAG::UpdateNodeOperands

Some overloads failed to update divergence.

Differential Revision: https://reviews.llvm.org/D47148


Added:
    llvm/trunk/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=333947&r1=333946&r2=333947&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jun  4 13:19:45 2018
@@ -6880,6 +6880,7 @@ SDNode *SelectionDAG::UpdateNodeOperands
   // Now we update the operands.
   N->OperandList[0].set(Op);
 
+  updateDivergence(N);
   // If this gets put into a CSE map, add it.
   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
   return N;
@@ -6959,6 +6960,7 @@ UpdateNodeOperands(SDNode *N, ArrayRef<S
     if (N->OperandList[i] != Ops[i])
       N->OperandList[i].set(Ops[i]);
 
+  updateDivergence(N);
   // If this gets put into a CSE map, add it.
   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
   return N;

Added: llvm/trunk/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll?rev=333947&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll Mon Jun  4 13:19:45 2018
@@ -0,0 +1,30 @@
+; RUN: llc -march=amdgcn < %s
+
+; Tests for a bug in SelectionDAG::UpdateNodeOperands exposed by VectorLegalizer
+; where divergence information is not updated.
+
+declare i32 @llvm.amdgcn.workitem.id.x()
+
+define amdgpu_kernel void @spam(double addrspace(1)* noalias %arg) {
+  %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
+  %tmp1 = zext i32 %tmp to i64
+  %tmp2 = getelementptr inbounds double, double addrspace(1)* %arg, i64 %tmp1
+  %tmp3 = load double, double addrspace(1)* %tmp2, align 8
+  %tmp4 = fadd double undef, 0.000000e+00
+  %tmp5 = insertelement <2 x double> undef, double %tmp4, i64 0
+  %tmp6 = insertelement <2 x double> %tmp5, double %tmp3, i64 1
+  %tmp7 = insertelement <2 x double> %tmp6, double 0.000000e+00, i64 1
+  %tmp8 = fadd <2 x double> zeroinitializer, undef
+  %tmp9 = fadd <2 x double> %tmp7, zeroinitializer
+  %tmp10 = extractelement <2 x double> %tmp8, i64 0
+  %tmp11 = getelementptr inbounds double, double addrspace(1)* %tmp2, i64 2
+  store double %tmp10, double addrspace(1)* %tmp11, align 8
+  %tmp12 = getelementptr inbounds double, double addrspace(1)* %tmp2, i64 3
+  store double undef, double addrspace(1)* %tmp12, align 8
+  %tmp13 = extractelement <2 x double> %tmp9, i64 0
+  %tmp14 = getelementptr inbounds double, double addrspace(1)* %tmp2, i64 6
+  store double %tmp13, double addrspace(1)* %tmp14, align 8
+  %tmp15 = getelementptr inbounds double, double addrspace(1)* %tmp2, i64 7
+  store double 0.000000e+00, double addrspace(1)* %tmp15, align 8
+  ret void
+}