[PATCH] D47425: [AArch64][GlobalISel] Zero-extend s1 values when returning.

[Roman Tereshin via Phabricator via llvm-commits]

rtereshin accepted this revision.
rtereshin added a comment.
This revision is now accepted and ready to land.

Please take a look at the small nitpick, otherwise LGTM. Thanks!



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Comment at: lib/Target/AArch64/AArch64CallLowering.cpp:237
+      MIRBuilder.buildZExt(ZExt, VReg);
+      VReg = ZExt;
+    }
----------------
I think the preferred way of doing this would be `VReg = MIRBuilder.buildZExt(LLT::scalar(8), VReg)->getOperand(0).getReg();` just to avoid the explicit `MachineRegisterInfo::createGenericVirtualRegister` call. + at aditya_nandakumar 


Repository:
  rL LLVM

https://reviews.llvm.org/D47425