[PATCH] D47504: [AMDGPU] Simplify memory legalizer
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 31 01:48:49 PDT 2018
arsenm added a comment.
Should add some tests for this GDS support. Using a pure MIR test you can bypass the fact that we don't codegen it yet
================
Comment at: test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir:3
+
+--- |
+ ; ModuleID = 'memory-legalizer-invalid-addrspace.ll'
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t-tye wrote:
> rampitec wrote:
> > Could you strip mir test from all IR part?
> The MMO references the IR to get the address space so I believe it is needed.
The MMO should be able to support address spaces without an IR reference
================
Comment at: test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir:36-55
+ ; Function Attrs: convergent nounwind
+ declare { i1, i64 } @llvm.amdgcn.if.i64(i1) #1
+
+ ; Function Attrs: convergent nounwind
+ declare { i1, i64 } @llvm.amdgcn.else.i64.i64(i64) #1
+
+ ; Function Attrs: convergent nounwind readnone
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You can definitely strip out all of the declarations
https://reviews.llvm.org/D47504
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