[PATCH] D47573: {Power9} Enable extload of constant values to f128

[Lei Huang via Phabricator via llvm-commits]

lei created this revision.
lei added reviewers: nemanjai, kbarton, stefanp, sfertile, hfinkel.

Enable` extload` of constant values to f128


https://reviews.llvm.org/D47573

Files:
  lib/Target/PowerPC/PPCISelLowering.cpp
  test/CodeGen/PowerPC/f128-passByValue.ll


Index: test/CodeGen/PowerPC/f128-passByValue.ll
===================================================================
--- test/CodeGen/PowerPC/f128-passByValue.ll
+++ test/CodeGen/PowerPC/f128-passByValue.ll
@@ -3,6 +3,34 @@
 ; RUN:   -enable-ppc-quad-precision -ppc-asm-full-reg-names \
 ; RUN:   -verify-machineinstrs < %s | FileCheck %s
 
+; Function Attrs: norecurse nounwind readnone
+define fp128 @loadConstant() {
+; CHECK-LABEL: loadConstant:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis r3, r2, .LCPI0_0 at toc@ha
+; CHECK-NEXT:    addi r3, r3, .LCPI0_0 at toc@l
+; CHECK-NEXT:    lxvx vs34, 0, r3
+; CHECK-NEXT:    blr
+entry:
+  ret fp128 0xL00000000000000004001400000000000
+}
+
+; Function Attrs: norecurse nounwind readnone
+define fp128 @loadConstant2(fp128 %a, fp128 %b) {
+; CHECK-LABEL: loadConstant2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xsaddqp v2, v2, v3
+; CHECK-NEXT:    addis r3, r2, .LCPI1_0 at toc@ha
+; CHECK-NEXT:    addi r3, r3, .LCPI1_0 at toc@l
+; CHECK-NEXT:    lxvx vs51, 0, r3
+; CHECK-NEXT:    xsaddqp v2, v2, v19
+; CHECK-NEXT:    blr
+entry:
+  %add = fadd fp128 %a, %b
+  %add1 = fadd fp128 %add, 0xL00000000000000004001400000000000
+  ret fp128 %add1
+}
+
 ; Test passing float128 by value.
 ; Function Attrs: norecurse nounwind readnone
 define signext i32 @fp128Param(fp128 %a) {
Index: lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- lib/Target/PowerPC/PPCISelLowering.cpp
+++ lib/Target/PowerPC/PPCISelLowering.cpp
@@ -797,8 +797,8 @@
         setOperationAction(ISD::FDIV, MVT::f128, Legal);
         setOperationAction(ISD::FMUL, MVT::f128, Legal);
         setOperationAction(ISD::FP_EXTEND, MVT::f128, Legal);
-        setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f64, Expand);
-        setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f32, Expand);
+        for (MVT VT : MVT::fp_valuetypes())
+          setLoadExtAction(ISD::EXTLOAD, MVT::f128, VT, Expand);
         setOperationAction(ISD::FMA, MVT::f128, Legal);
         setOperationAction(ISD::FP_ROUND, MVT::f64, Legal);
         setOperationAction(ISD::FP_ROUND, MVT::f32, Legal);


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