[PATCH] D46949: [mips] Correct the predicates of the cache and pref instructions
Simon Dardis via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 22 03:59:04 PDT 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL332970: [mips] Correct the predicates of the cache and pref instructions (authored by sdardis, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D46949?vs=147095&id=147982#toc
Repository:
rL LLVM
https://reviews.llvm.org/D46949
Files:
llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td
llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
llvm/trunk/test/MC/Mips/micromips/valid.s
llvm/trunk/test/MC/Mips/micromips32r6/valid.s
llvm/trunk/test/MC/Mips/mips32r6/valid.s
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