[PATCH] D46528: [DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 9 14:03:31 PDT 2018
lebedev.ri added inline comments.
================
Comment at: lib/Target/AArch64/AArch64ISelLowering.h:444
- bool hasAndNotCompare(SDValue) const override {
- // 'bics'
- return true;
+ bool hasAndNotCompare(SDValue Y) const override {
+ EVT VT = Y.getValueType();
----------------
spatel wrote:
> The name of the function is overly specific if we're including bsl and instructions too. I think we should either generalize that name or add a different hook for "hasBitwiseSelect".
Currently for AArch64, `hasAndNot()` is not overriden.
We could rename it to that, and make `hasAndNotCompare()` call `hasAndNot()`.
Or is this about these hooks in general?
Repository:
rL LLVM
https://reviews.llvm.org/D46528
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