[PATCH] D46221: [RISCV] Implement MC layer support for the tail pseudoinstruction

Mandeep Singh Grang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 2 13:11:04 PDT 2018


mgrang updated this revision to Diff 144919.
mgrang retitled this revision from "[RISCV] Lower tail pseudo instruction" to "[RISCV] Implement MC layer support for the tail pseudoinstruction".
mgrang edited the summary of this revision.

https://reviews.llvm.org/D46221

Files:
  lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVISelLowering.h
  lib/Target/RISCV/RISCVInstrInfo.td
  test/MC/RISCV/tail-call-invalid.s
  test/MC/RISCV/tail-call.s

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D46221.144919.patch
Type: text/x-patch
Size: 5832 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180502/0a3c5be8/attachment.bin>


More information about the llvm-commits mailing list