[PATCH] D46272: AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers
Tom Stellard via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 30 10:05:41 PDT 2018
tstellar created this revision.
tstellar added reviewers: arsenm, nhaehnle.
Herald added subscribers: javed.absar, t-tye, tpr, dstuttard, yaxunl, wdng, kzhuravl, MatzeB.
MCTargetDesc/AMDGPUMCTargetDesc.h contains enums for all the instuction
and register defintions, which are huge so we only want to include
them where needed.
This will also make it easier if we want to split the R600 and GCN
definitions into separate tablegenerated files.
Repository:
rL LLVM
https://reviews.llvm.org/D46272
Files:
lib/Target/AMDGPU/AMDGPU.h
lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
lib/Target/AMDGPU/AMDGPUCallLowering.cpp
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
lib/Target/AMDGPU/AMDGPURegisterInfo.cpp
lib/Target/AMDGPU/AMDGPUSubtarget.cpp
lib/Target/AMDGPU/AMDGPUSubtarget.h
lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
lib/Target/AMDGPU/GCNHazardRecognizer.cpp
lib/Target/AMDGPU/R600ClauseMergePass.cpp
lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
lib/Target/AMDGPU/R600ISelLowering.cpp
lib/Target/AMDGPU/R600InstrInfo.cpp
lib/Target/AMDGPU/R600MachineScheduler.cpp
lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
lib/Target/AMDGPU/R600Packetizer.cpp
lib/Target/AMDGPU/R600RegisterInfo.cpp
lib/Target/AMDGPU/SIDebuggerInsertNops.cpp
lib/Target/AMDGPU/SIFixSGPRCopies.cpp
lib/Target/AMDGPU/SIFixVGPRCopies.cpp
lib/Target/AMDGPU/SIFixWWMLiveness.cpp
lib/Target/AMDGPU/SIFoldOperands.cpp
lib/Target/AMDGPU/SIFrameLowering.cpp
lib/Target/AMDGPU/SIISelLowering.cpp
lib/Target/AMDGPU/SIInsertSkips.cpp
lib/Target/AMDGPU/SIInsertWaits.cpp
lib/Target/AMDGPU/SIInstrInfo.cpp
lib/Target/AMDGPU/SIInstrInfo.h
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
lib/Target/AMDGPU/SILowerControlFlow.cpp
lib/Target/AMDGPU/SILowerI1Copies.cpp
lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
lib/Target/AMDGPU/SIMachineFunctionInfo.h
lib/Target/AMDGPU/SIMachineScheduler.cpp
lib/Target/AMDGPU/SIMemoryLegalizer.cpp
lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
lib/Target/AMDGPU/SIPeepholeSDWA.cpp
lib/Target/AMDGPU/SIRegisterInfo.cpp
lib/Target/AMDGPU/SIRegisterInfo.h
lib/Target/AMDGPU/SIShrinkInstructions.cpp
lib/Target/AMDGPU/SIWholeQuadMode.cpp
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