[PATCH] D46215: [AArch64] Support reserving x16 and x17 register

[Petr Hosek via Phabricator via llvm-commits]

phosek created this revision.
phosek added reviewers: chandlerc, mcgrathr.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls, rengolin.
Herald added a reviewer: javed.absar.

Registers x16 and 17 are defined as linker temporaries, which are used
for purposes such as veneers. However, in some cases these may be used
for other purposes in certain contexts, for example to hold special
variables within the kernel.

We would like to use these registers to hold the per-CPU pointer in Fuchsia
kernel. This change adds support for reserving these registers both to
frontend and backend to make these registers usable for such purpose.


Repository:
  rL LLVM

https://reviews.llvm.org/D46215

Files:
  clang/docs/ClangCommandLineReference.rst
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/test/Driver/aarch64-fixed-x16.c
  clang/test/Driver/aarch64-fixed-x17.c
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/test/CodeGen/AArch64/arm64-platform-reg.ll

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