[PATCH] D46009: [AArch64] Custom Lower MULLH{S, U} for v16i8, v8i16, and v4i32

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added inline comments.


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:2557
 
+static SDValue LowerMULH(SDValue Op, SelectionDAG &DAG, bool sign) {
+  EVT VT = Op.getValueType();
----------------
Do you need to pass the 'sign' boolean? Can you not look at the opcode and check for ISD::MULHS or ISD::MULHU?


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:2727
     return LowerMUL(Op, DAG);
+  case ISD::MULHS:
+    return LowerMULH(Op, DAG, true);
----------------
If you check the opcode inside LowerMULH, this can be simplified a bit, both these cases can fallthrough and call LowerMULH.


================
Comment at: test/CodeGen/AArch64/arm64-neon-mul-div-cte.ll:3
+
+define <16 x i8> @mul8xi16(<16 x i8> %x) {
+; CHECK-LABEL: mul8xi16:
----------------
nit: this is mul16xi8


================
Comment at: test/CodeGen/AArch64/arm64-neon-mul-div-cte.ll:14
+
+define <8 x i16> @mul16xi8(<8 x i16> %x) {
+; CHECK-LABEL: mul16xi8:
----------------
nit: this is mul8xi16


Repository:
  rL LLVM

https://reviews.llvm.org/D46009