[PATCH] D46009: [AArch64] Custom Lower MULLH{S, U} for v16i8, v8i16, and v4i32
Adhemerval Zanella via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 24 06:46:27 PDT 2018
zatrazz created this revision.
zatrazz added reviewers: fhahn, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro, rengolin.
Herald added a subscriber: kristof.beyls.
This patch adds a custom lowering for ISD::MULH{S,U} used on divide by
constant optimization (DAGCombiner::BuildSDIV and DAGCombiner::BuildUDIV).
New patterns for smull and umull are added, so AArch64ISD::{S,U}MULL
can be correctly lowered to smull2 and umull2.
Repository:
rL LLVM
https://reviews.llvm.org/D46009
Files:
lib/Target/AArch64/AArch64ISelLowering.cpp
lib/Target/AArch64/AArch64InstrInfo.td
test/CodeGen/AArch64/arm64-neon-mul-div-cte.ll
test/CodeGen/AArch64/neon-idiv.ll
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