[llvm] r330929 - [AArch64][SVE] Asm: Negative tests for all LD1 gather (scalar+vector) load instructions.
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 26 01:43:23 PDT 2018
Author: s.desmalen
Date: Thu Apr 26 01:43:22 2018
New Revision: 330929
URL: http://llvm.org/viewvc/llvm-project?rev=330929&view=rev
Log:
[AArch64][SVE] Asm: Negative tests for all LD1 gather (scalar+vector) load instructions.
Patch [3/3] in series to add support for SVE's gather load instructions
that use scalar+vector addressing modes:
- Patch [1/3]: https://reviews.llvm.org/D45951
- Patch [2/3]: https://reviews.llvm.org/D46023
- Patch [3/3]: https://reviews.llvm.org/D45958
Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, t.p.northover, echristo, evandro, javed.absar
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D45958
Modified:
llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -109,3 +109,47 @@ ld1b z0.b, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
// CHECK-NEXT: ld1b z0.b, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ld1b z0.d, p0/z, [x0, z0.b]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.b]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1b z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1b z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1b z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1b z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1b z0.s, p0/z, [x0, z0.s, uxtw #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1b z0.s, p0/z, [x0, z0.s, uxtw #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1b z0.s, p0/z, [x0, z0.s, lsl #0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1b z0.s, p0/z, [x0, z0.s, lsl #0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1b z0.d, p0/z, [x0, z0.d, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.d, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1b z0.d, p0/z, [x0, z0.d, sxtw #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.d, sxtw #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -69,3 +69,27 @@ ld1d z0.d, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
// CHECK-NEXT: ld1d z0.d, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ld1d z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1d z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1d z0.d, p0/z, [x0, z0.d, uxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1d z0.d, p0/z, [x0, z0.d, uxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1d z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1d z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1d z0.d, p0/z, [x0, z0.d, lsl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected #imm after shift specifier
+// CHECK-NEXT: ld1d z0.d, p0/z, [x0, z0.d, lsl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -99,3 +99,42 @@ ld1h z0.h, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
// CHECK-NEXT: ld1h z0.h, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ld1h z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1h z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1h z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1h z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1h z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1h z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1h z0.s, p0/z, [x0, z0.s, uxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1h z0.s, p0/z, [x0, z0.s, uxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1h z0.s, p0/z, [x0, z0.s, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1h z0.s, p0/z, [x0, z0.s, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1h z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1h z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1h z0.d, p0/z, [x0, z0.d, sxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1h z0.d, p0/z, [x0, z0.d, sxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -108,3 +108,46 @@ ld1sb z0.h, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
// CHECK-NEXT: ld1sb z0.h, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ld1sb z0.d, p0/z, [x0, z0.b]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sb z0.d, p0/z, [x0, z0.b]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sb z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sb z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sb z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sb z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sb z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sb z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sb z0.s, p0/z, [x0, z0.s, uxtw #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sb z0.s, p0/z, [x0, z0.s, uxtw #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sb z0.s, p0/z, [x0, z0.s, lsl #0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sb z0.s, p0/z, [x0, z0.s, lsl #0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sb z0.d, p0/z, [x0, z0.d, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sb z0.d, p0/z, [x0, z0.d, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sb z0.d, p0/z, [x0, z0.d, sxtw #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sb z0.d, p0/z, [x0, z0.d, sxtw #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -98,3 +98,42 @@ ld1sh z0.s, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
// CHECK-NEXT: ld1sh z0.s, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ld1sh z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sh z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sh z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sh z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sh z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sh z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sh z0.s, p0/z, [x0, z0.s, uxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sh z0.s, p0/z, [x0, z0.s, uxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sh z0.s, p0/z, [x0, z0.s, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sh z0.s, p0/z, [x0, z0.s, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sh z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sh z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sh z0.d, p0/z, [x0, z0.d, sxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sh z0.d, p0/z, [x0, z0.d, sxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -83,3 +83,47 @@ ld1sw z0.d, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ld1sw z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sw z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sw z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sw z0.d, p0/z, [x0, z0.d, uxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, uxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sw z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sw z0.d, p0/z, [x0, z0.d, lsl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected #imm after shift specifier
+// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, lsl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sw z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1sw z0.d, p0/z, [x0, z0.d, sxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, sxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -84,3 +84,42 @@ ld1w z0.s, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
// CHECK-NEXT: ld1w z0.s, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ld1w z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1w z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1w z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1w z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1w z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1w z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1w z0.s, p0/z, [x0, z0.s, uxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1w z0.s, p0/z, [x0, z0.s, uxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1w z0.s, p0/z, [x0, z0.s, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1w z0.s, p0/z, [x0, z0.s, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1w z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1w z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ld1w z0.d, p0/z, [x0, z0.d, sxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
+// CHECK-NEXT: ld1w z0.d, p0/z, [x0, z0.d, sxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -45,3 +45,46 @@ ldff1b z0.b, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift
// CHECK-NEXT: ldff1b z0.b, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ldff1b z0.d, p0/z, [x0, z0.b]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1b z0.d, p0/z, [x0, z0.b]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1b z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1b z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1b z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1b z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1b z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1b z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1b z0.s, p0/z, [x0, z0.s, uxtw #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1b z0.s, p0/z, [x0, z0.s, uxtw #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1b z0.s, p0/z, [x0, z0.s, lsl #0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1b z0.s, p0/z, [x0, z0.s, lsl #0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1b z0.d, p0/z, [x0, z0.d, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1b z0.d, p0/z, [x0, z0.d, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1b z0.d, p0/z, [x0, z0.d, sxtw #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1b z0.d, p0/z, [x0, z0.d, sxtw #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -49,3 +49,26 @@ ldff1d z0.d, p0/z, [x0, w0, uxtw]
// CHECK-NEXT: ldff1d z0.d, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ldff1d z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1d z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1d z0.d, p0/z, [x0, z0.d, uxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1d z0.d, p0/z, [x0, z0.d, uxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1d z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1d z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1d z0.d, p0/z, [x0, z0.d, lsl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected #imm after shift specifier
+// CHECK-NEXT: ldff1d z0.d, p0/z, [x0, z0.d, lsl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -48,3 +48,42 @@ ldff1h z0.h, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #1'
// CHECK-NEXT: ldff1h z0.h, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ldff1h z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1h z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1h z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1h z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1h z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1h z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1h z0.s, p0/z, [x0, z0.s, uxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1h z0.s, p0/z, [x0, z0.s, uxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1h z0.s, p0/z, [x0, z0.s, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1h z0.s, p0/z, [x0, z0.s, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1h z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1h z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1h z0.d, p0/z, [x0, z0.d, sxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1h z0.d, p0/z, [x0, z0.d, sxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -48,3 +48,46 @@ ldff1sb z0.h, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift
// CHECK-NEXT: ldff1sb z0.h, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ldff1sb z0.d, p0/z, [x0, z0.b]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.b]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sb z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sb z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sb z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sb z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sb z0.s, p0/z, [x0, z0.s, uxtw #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sb z0.s, p0/z, [x0, z0.s, uxtw #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sb z0.s, p0/z, [x0, z0.s, lsl #0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sb z0.s, p0/z, [x0, z0.s, lsl #0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sb z0.d, p0/z, [x0, z0.d, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.d, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sb z0.d, p0/z, [x0, z0.d, sxtw #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.d, sxtw #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -43,3 +43,41 @@ ldff1sh z0.s, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
// CHECK-NEXT: ldff1sh z0.s, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ldff1sh z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sh z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sh z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sh z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sh z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sh z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sh z0.s, p0/z, [x0, z0.s, uxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sh z0.s, p0/z, [x0, z0.s, uxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sh z0.s, p0/z, [x0, z0.s, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sh z0.s, p0/z, [x0, z0.s, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sh z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sh z0.d, p0/z, [x0, z0.d, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sh z0.d, p0/z, [x0, z0.d, sxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sh z0.d, p0/z, [x0, z0.d, sxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -38,3 +38,47 @@ ldff1sw z0.d, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ldff1sw z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sw z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sw z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sw z0.d, p0/z, [x0, z0.d, uxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, uxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sw z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sw z0.d, p0/z, [x0, z0.d, lsl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected #imm after shift specifier
+// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, lsl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sw z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1sw z0.d, p0/z, [x0, z0.d, sxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, sxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s?rev=330929&r1=330928&r2=330929&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s Thu Apr 26 01:43:22 2018
@@ -48,3 +48,42 @@ ldff1w z0.s, p0/z, [x0, w0, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
// CHECK-NEXT: ldff1w z0.s, p0/z, [x0, w0, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid scalar + vector addressing modes
+
+ldff1w z0.d, p0/z, [x0, z0.h]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1w z0.d, p0/z, [x0, z0.h]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1w z0.d, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1w z0.d, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1w z0.s, p0/z, [x0, z0.s]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1w z0.s, p0/z, [x0, z0.s]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1w z0.s, p0/z, [x0, z0.s, uxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1w z0.s, p0/z, [x0, z0.s, uxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1w z0.s, p0/z, [x0, z0.s, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1w z0.s, p0/z, [x0, z0.s, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1w z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1w z0.d, p0/z, [x0, z0.d, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldff1w z0.d, p0/z, [x0, z0.d, sxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
+// CHECK-NEXT: ldff1w z0.d, p0/z, [x0, z0.d, sxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
More information about the llvm-commits
mailing list