[PATCH] D45821: [AArch64] improve code generation of vectors smaller than 64 bit

[Javed Absar via Phabricator via llvm-commits]

javed.absar added a comment.

Thanks for this Sebastian. Overall, this definitely look good for vectorization.



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Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.h:99
 
   // Enable 64-bit vectorization in SLP.
+  unsigned MinVectorRegisterBitWidth = 16;
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Maybe i dont understand this part properly. But should the comment change to reflect the change?


https://reviews.llvm.org/D45821