[PATCH] D45689: [AArch64][SVE] Added GPR64shifted and GPR64NoXZRshifted register classes.

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 19 01:08:48 PDT 2018


SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.
This revision is now accepted and ready to land.

Looks good to me, just one nit inlined.



================
Comment at: lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp:972
 
-void AArch64InstPrinter::printMemExtend(const MCInst *MI, unsigned OpNum,
-                                        raw_ostream &O, char SrcRegKind,
-                                        unsigned Width) {
-  unsigned SignExtend = MI->getOperand(OpNum).getImm();
-  unsigned DoShift = MI->getOperand(OpNum + 1).getImm();
-
+static void printMemExtendImpl(unsigned SignExtend, unsigned DoShift,
+                               unsigned Width, char SrcRegKind,
----------------
Nit: SignExtend and DoShift can be booleans?


================
Comment at: lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp:989
+                                        unsigned Width) {
+  unsigned SignExtend = MI->getOperand(OpNum).getImm();
+  unsigned DoShift = MI->getOperand(OpNum + 1).getImm();
----------------
Same here?


https://reviews.llvm.org/D45689





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