[PATCH] D45204: [X86][MIPS][ARM] New machine instruction property 'isMoveReg'

[Nikola Prica via Phabricator via llvm-commits]

NikolaPrica updated this revision to Diff 141974.
NikolaPrica added a comment.

[ARM]  Consider VORRq as copy instruction when two inputs are the same register

  Treat tMOVsr as isMoveReg
  Treat VMOVRRD as isMoveReg


https://reviews.llvm.org/D45204

Files:
  include/llvm/CodeGen/MachineInstr.h
  include/llvm/CodeGen/TargetInstrInfo.h
  include/llvm/MC/MCInstrDesc.h
  include/llvm/Target/Target.td
  lib/Target/ARM/ARMBaseInstrInfo.cpp
  lib/Target/ARM/ARMBaseInstrInfo.h
  lib/Target/ARM/ARMInstrInfo.td
  lib/Target/ARM/ARMInstrThumb.td
  lib/Target/ARM/ARMInstrVFP.td
  lib/Target/Mips/MicroMipsDSPInstrInfo.td
  lib/Target/Mips/MicroMipsInstrFPU.td
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/Mips16InstrInfo.td
  lib/Target/Mips/Mips64InstrInfo.td
  lib/Target/Mips/MipsDSPInstrInfo.td
  lib/Target/Mips/MipsInstrFPU.td
  lib/Target/Mips/MipsInstrInfo.td
  lib/Target/Mips/MipsMSAInstrInfo.td
  lib/Target/Mips/MipsSEInstrInfo.cpp
  lib/Target/Mips/MipsSEInstrInfo.h
  lib/Target/X86/X86InstrAVX512.td
  lib/Target/X86/X86InstrInfo.td
  lib/Target/X86/X86InstrMMX.td
  lib/Target/X86/X86InstrSSE.td
  utils/TableGen/CodeGenInstruction.cpp
  utils/TableGen/CodeGenInstruction.h
  utils/TableGen/InstrInfoEmitter.cpp

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