[llvm] r329591 - AMDGPU: enable 128-bit for local addr space under an option

Aleksey Shlyapnikov via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 9 11:10:00 PDT 2018 

Here's another one:
http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/9495

On Mon, Apr 9, 2018 at 10:37 AM, Aleksey Shlyapnikov <alekseys at google.com>
wrote:

> It seems that at least one bot is unhappy about this change:
> http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/16516
>
> On Mon, Apr 9, 2018 at 9:56 AM, Marek Olsak via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
>
>> Author: mareko
>> Date: Mon Apr  9 09:56:32 2018
>> New Revision: 329591
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=329591&view=rev
>> Log:
>> AMDGPU: enable 128-bit for local addr space under an option
>>
>> Author: Samuel Pitoiset
>>
>> ds_read_b128 and ds_write_b128 have been recently enabled
>> under the amdgpu-ds128 option because the performance benefit
>> is unclear.
>>
>> Though, using 128-bit loads/stores for the local address space
>> appears to introduce regressions in tessellation shaders. Not
>> sure what is broken, but as ds_read_b128/ds_write_b128 are not
>> enabled by default, just introduce a global option and enable
>> 128-bit only if requested (until it's fixed/used correctly).
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
>>
>> Modified:
>>     llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
>>     llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
>>     llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
>>     llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
>>     llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
>>     llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll
>>     llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll
>>     llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll
>>     llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll
>>     llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll
>>     llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll
>>
>> Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AM
>> DGPU/AMDGPU.td?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/lib/Target/AMDGPU/AMDGPU.td (original)
>> +++ llvm/trunk/lib/Target/AMDGPU/AMDGPU.td Mon Apr  9 09:56:32 2018
>> @@ -426,6 +426,12 @@ def FeatureEnableSIScheduler : Subtarget
>>    "Enable SI Machine Scheduler"
>>  >;
>>
>> +def FeatureEnableDS128 : SubtargetFeature<"enable-ds128",
>> +  "EnableDS128",
>> +  "true",
>> +  "Use ds_{read|write}_b128"
>> +>;
>> +
>>  // Unless +-flat-for-global is specified, turn on FlatForGlobal for
>>  // all OS-es on VI and newer hardware to avoid assertion failures due
>>  // to missing ADDR64 variants of MUBUF instructions.
>>
>> Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AM
>> DGPU/AMDGPUSubtarget.cpp?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp (original)
>> +++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp Mon Apr  9 09:56:32
>> 2018
>> @@ -132,6 +132,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(const T
>>      EnableLoadStoreOpt(false),
>>      EnableUnsafeDSOffsetFolding(false),
>>      EnableSIScheduler(false),
>> +    EnableDS128(false),
>>      DumpCode(false),
>>
>>      FP64(false),
>>
>> Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AM
>> DGPU/AMDGPUSubtarget.h?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h (original)
>> +++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h Mon Apr  9 09:56:32
>> 2018
>> @@ -133,6 +133,7 @@ protected:
>>    bool EnableLoadStoreOpt;
>>    bool EnableUnsafeDSOffsetFolding;
>>    bool EnableSIScheduler;
>> +  bool EnableDS128;
>>    bool DumpCode;
>>
>>    // Subtarget statically properties set by tablegen
>> @@ -412,8 +413,8 @@ public:
>>
>>    /// \returns If target supports ds_read/write_b128 and user enables
>> generation
>>    /// of ds_read/write_b128.
>> -  bool useDS128(bool UserEnable) const {
>> -    return CIInsts && UserEnable;
>> +  bool useDS128() const {
>> +    return CIInsts && EnableDS128;
>>    }
>>
>>    /// \returns If MUBUF instructions always perform range checking, even
>> for
>>
>> Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AM
>> DGPU/AMDGPUTargetTransformInfo.cpp?rev=329591&r1=329590&r2=3
>> 29591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (original)
>> +++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp Mon Apr
>> 9 09:56:32 2018
>> @@ -265,11 +265,13 @@ unsigned AMDGPUTTIImpl::getLoadStoreVecR
>>      return 512;
>>    }
>>
>> -  if (AddrSpace == AS.FLAT_ADDRESS ||
>> -      AddrSpace == AS.LOCAL_ADDRESS ||
>> -      AddrSpace == AS.REGION_ADDRESS)
>> +  if (AddrSpace == AS.FLAT_ADDRESS)
>>      return 128;
>>
>> +  if (AddrSpace == AS.LOCAL_ADDRESS ||
>> +      AddrSpace == AS.REGION_ADDRESS)
>> +    return ST->useDS128() ? 128 : 64;
>> +
>>    if (AddrSpace == AS.PRIVATE_ADDRESS)
>>      return 8 * ST->getMaxPrivateElementSize();
>>
>>
>> Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AM
>> DGPU/SIISelLowering.cpp?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
>> +++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Mon Apr  9 09:56:32
>> 2018
>> @@ -94,11 +94,6 @@ static cl::opt<bool> EnableVGPRIndexMode
>>    cl::desc("Use GPR indexing mode instead of movrel for vector
>> indexing"),
>>    cl::init(false));
>>
>> -static cl::opt<bool> EnableDS128(
>> -  "amdgpu-ds128",
>> -  cl::desc("Use DS_read/write_b128"),
>> -  cl::init(false));
>> -
>>  static cl::opt<unsigned> AssumeFrameIndexHighZeroBits(
>>    "amdgpu-frame-index-zero-bits",
>>    cl::desc("High bits of frame index assumed to be zero"),
>> @@ -5300,7 +5295,7 @@ SDValue SITargetLowering::LowerLOAD(SDVa
>>      }
>>    } else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
>>      // Use ds_read_b128 if possible.
>> -    if (Subtarget->useDS128(EnableDS128) && Load->getAlignment() >= 16
>> &&
>> +    if (Subtarget->useDS128() && Load->getAlignment() >= 16 &&
>>          MemVT.getStoreSize() == 16)
>>        return SDValue();
>>
>> @@ -5703,7 +5698,7 @@ SDValue SITargetLowering::LowerSTORE(SDV
>>      }
>>    } else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
>>      // Use ds_write_b128 if possible.
>> -    if (Subtarget->useDS128(EnableDS128) && Store->getAlignment() >= 16
>> &&
>> +    if (Subtarget->useDS128() && Store->getAlignment() >= 16 &&
>>          VT.getStoreSize() == 16)
>>        return SDValue();
>>
>>
>> Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
>> AMDGPU/load-local-f32.ll?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll (original)
>> +++ llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll Mon Apr  9 09:56:32
>> 2018
>> @@ -3,9 +3,9 @@
>>  ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck
>> -check-prefixes=EG,FUNC %s
>>
>>  ; Testing for ds_read/write_128
>> -; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=SI,FUNC %s
>> -; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=CIVI,FUNC %s
>> -; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=SI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=CIVI,FUNC %s
>>
>>  ; FUNC-LABEL: {{^}}load_f32_local:
>>  ; SICIVI: s_mov_b32 m0
>>
>> Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
>> AMDGPU/load-local-f64.ll?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll (original)
>> +++ llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll Mon Apr  9 09:56:32
>> 2018
>> @@ -5,8 +5,8 @@
>>  ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck
>> -check-prefixes=EG,FUNC %s
>>
>>  ; Testing for ds_read_b128
>> -; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128
>> < %s | FileCheck -check-prefixes=CIVI,FUNC %s
>> -; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs
>> -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs
>> -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs
>> -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
>>
>>  ; FUNC-LABEL: {{^}}local_load_f64:
>>  ; SICIV: s_mov_b32 m0
>>
>> Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
>> AMDGPU/load-local-i16.ll?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll (original)
>> +++ llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll Mon Apr  9 09:56:32
>> 2018
>> @@ -4,8 +4,8 @@
>>  ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s |
>> FileCheck -check-prefix=EG -check-prefix=FUNC %s
>>
>>  ; Testing for ds_read/write_b128
>> -; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=CIVI,FUNC %s
>> -; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=CIVI,FUNC %s
>>
>>  ; FUNC-LABEL: {{^}}local_load_i16:
>>  ; GFX9-NOT: m0
>>
>> Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
>> AMDGPU/load-local-i32.ll?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll (original)
>> +++ llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll Mon Apr  9 09:56:32
>> 2018
>> @@ -4,9 +4,9 @@
>>  ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG
>> -check-prefix=FUNC %s
>>
>>  ; Testing for ds_read/write_128
>> -; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=SI,FUNC %s
>> -; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=CIVI,FUNC %s
>> -; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=SI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=CIVI,FUNC %s
>>
>>  ; FUNC-LABEL: {{^}}local_load_i32:
>>  ; GCN-NOT: s_wqm_b64
>>
>> Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
>> AMDGPU/load-local-i64.ll?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll (original)
>> +++ llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll Mon Apr  9 09:56:32
>> 2018
>> @@ -5,8 +5,8 @@
>>  ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck
>> -check-prefixes=EG,FUNC %s
>>
>>  ; Testing for ds_read/write_b128
>> -; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128
>> < %s | FileCheck -check-prefixes=CIVI,FUNC %s
>> -; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs
>> -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs
>> -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs
>> -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
>>
>>  ; FUNC-LABEL: {{^}}local_load_i64:
>>  ; SICIVI: s_mov_b32 m0
>>
>> Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
>> AMDGPU/load-local-i8.ll?rev=329591&r1=329590&r2=329591&view=diff
>> ============================================================
>> ==================
>> --- llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll (original)
>> +++ llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll Mon Apr  9 09:56:32
>> 2018
>> @@ -4,8 +4,8 @@
>>  ; RUN: llc -march=r600 -mtriple=r600---amdgiz -mcpu=redwood
>> -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC
>> %s
>>
>>  ; Testing for ds_read/write_b128
>> -; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=CIVI,FUNC %s
>> -; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck
>> -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=CIVI,FUNC %s
>> +; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s |
>> FileCheck -check-prefixes=CIVI,FUNC %s
>>
>>  ; FUNC-LABEL: {{^}}local_load_i8:
>>  ; GCN-NOT: s_wqm_b64
>>
>>
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