<div dir="ltr">Here's another one: <a href="http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/9495">http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/9495</a><br></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Apr 9, 2018 at 10:37 AM, Aleksey Shlyapnikov <span dir="ltr"><<a href="mailto:alekseys@google.com" target="_blank">alekseys@google.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">It seems that at least one bot is unhappy about this change: <a href="http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/16516" target="_blank">http://lab.llvm.org:<wbr>8011/builders/sanitizer-x86_<wbr>64-linux-fast/builds/16516</a><br></div><div class="HOEnZb"><div class="h5"><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Apr 9, 2018 at 9:56 AM, Marek Olsak via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: mareko<br>
Date: Mon Apr 9 09:56:32 2018<br>
New Revision: 329591<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=329591&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject?rev=329591&view=rev</a><br>
Log:<br>
AMDGPU: enable 128-bit for local addr space under an option<br>
<br>
Author: Samuel Pitoiset<br>
<br>
ds_read_b128 and ds_write_b128 have been recently enabled<br>
under the amdgpu-ds128 option because the performance benefit<br>
is unclear.<br>
<br>
Though, using 128-bit loads/stores for the local address space<br>
appears to introduce regressions in tessellation shaders. Not<br>
sure what is broken, but as ds_read_b128/ds_write_b128 are not<br>
enabled by default, just introduce a global option and enable<br>
128-bit only if requested (until it's fixed/used correctly).<br>
<br>
Bugzilla: <a href="https://bugs.freedesktop.org/show_bug.cgi?id=105464" rel="noreferrer" target="_blank">https://bugs.freedesktop.org/s<wbr>how_bug.cgi?id=105464</a><br>
<br>
Modified:<br>
llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPU.td<br>
llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.cpp<br>
llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.h<br>
llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUTargetTransformInfo.cpp<br>
llvm/trunk/lib/Target/AMDGPU/S<wbr>IISelLowering.cpp<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f32.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f64.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i16.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i32.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i64.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i8.ll<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPU.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPU.td?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/AMDGPU.td?rev=329591&r1=<wbr>329590&r2=329591&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPU.td (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPU.td Mon Apr 9 09:56:32 2018<br>
@@ -426,6 +426,12 @@ def FeatureEnableSIScheduler : Subtarget<br>
"Enable SI Machine Scheduler"<br>
>;<br>
<br>
+def FeatureEnableDS128 : SubtargetFeature<"enable-ds128<wbr>",<br>
+ "EnableDS128",<br>
+ "true",<br>
+ "Use ds_{read|write}_b128"<br>
+>;<br>
+<br>
// Unless +-flat-for-global is specified, turn on FlatForGlobal for<br>
// all OS-es on VI and newer hardware to avoid assertion failures due<br>
// to missing ADDR64 variants of MUBUF instructions.<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/AMDGPUSubtarget.cpp?rev=<wbr>329591&r1=329590&r2=329591&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.cpp Mon Apr 9 09:56:32 2018<br>
@@ -132,6 +132,7 @@ AMDGPUSubtarget::AMDGPUSubtarg<wbr>et(const T<br>
EnableLoadStoreOpt(false),<br>
EnableUnsafeDSOffsetFolding(f<wbr>alse),<br>
EnableSIScheduler(false),<br>
+ EnableDS128(false),<br>
DumpCode(false),<br>
<br>
FP64(false),<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/AMDGPUSubtarget.h?rev=329<wbr>591&r1=329590&r2=329591&view=<wbr>diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.h (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.h Mon Apr 9 09:56:32 2018<br>
@@ -133,6 +133,7 @@ protected:<br>
bool EnableLoadStoreOpt;<br>
bool EnableUnsafeDSOffsetFolding;<br>
bool EnableSIScheduler;<br>
+ bool EnableDS128;<br>
bool DumpCode;<br>
<br>
// Subtarget statically properties set by tablegen<br>
@@ -412,8 +413,8 @@ public:<br>
<br>
/// \returns If target supports ds_read/write_b128 and user enables generation<br>
/// of ds_read/write_b128.<br>
- bool useDS128(bool UserEnable) const {<br>
- return CIInsts && UserEnable;<br>
+ bool useDS128() const {<br>
+ return CIInsts && EnableDS128;<br>
}<br>
<br>
/// \returns If MUBUF instructions always perform range checking, even for<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUTargetTransformInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/AMDGPUTargetTransformInfo<wbr>.cpp?rev=329591&r1=329590&r2=3<wbr>29591&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUTargetTransformInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUTargetTransformInfo.cpp Mon Apr 9 09:56:32 2018<br>
@@ -265,11 +265,13 @@ unsigned AMDGPUTTIImpl::getLoadStoreVec<wbr>R<br>
return 512;<br>
}<br>
<br>
- if (AddrSpace == AS.FLAT_ADDRESS ||<br>
- AddrSpace == AS.LOCAL_ADDRESS ||<br>
- AddrSpace == AS.REGION_ADDRESS)<br>
+ if (AddrSpace == AS.FLAT_ADDRESS)<br>
return 128;<br>
<br>
+ if (AddrSpace == AS.LOCAL_ADDRESS ||<br>
+ AddrSpace == AS.REGION_ADDRESS)<br>
+ return ST->useDS128() ? 128 : 64;<br>
+<br>
if (AddrSpace == AS.PRIVATE_ADDRESS)<br>
return 8 * ST->getMaxPrivateElementSize()<wbr>;<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/S<wbr>IISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/SIISelLowering.cpp?rev=32<wbr>9591&r1=329590&r2=329591&view=<wbr>diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/S<wbr>IISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/S<wbr>IISelLowering.cpp Mon Apr 9 09:56:32 2018<br>
@@ -94,11 +94,6 @@ static cl::opt<bool> EnableVGPRIndexMode<br>
cl::desc("Use GPR indexing mode instead of movrel for vector indexing"),<br>
cl::init(false));<br>
<br>
-static cl::opt<bool> EnableDS128(<br>
- "amdgpu-ds128",<br>
- cl::desc("Use DS_read/write_b128"),<br>
- cl::init(false));<br>
-<br>
static cl::opt<unsigned> AssumeFrameIndexHighZeroBits(<br>
"amdgpu-frame-index-zero-<wbr>bits",<br>
cl::desc("High bits of frame index assumed to be zero"),<br>
@@ -5300,7 +5295,7 @@ SDValue SITargetLowering::LowerLOAD(SD<wbr>Va<br>
}<br>
} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {<br>
// Use ds_read_b128 if possible.<br>
- if (Subtarget->useDS128(EnableDS1<wbr>28) && Load->getAlignment() >= 16 &&<br>
+ if (Subtarget->useDS128() && Load->getAlignment() >= 16 &&<br>
MemVT.getStoreSize() == 16)<br>
return SDValue();<br>
<br>
@@ -5703,7 +5698,7 @@ SDValue SITargetLowering::LowerSTORE(S<wbr>DV<br>
}<br>
} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {<br>
// Use ds_write_b128 if possible.<br>
- if (Subtarget->useDS128(EnableDS1<wbr>28) && Store->getAlignment() >= 16 &&<br>
+ if (Subtarget->useDS128() && Store->getAlignment() >= 16 &&<br>
VT.getStoreSize() == 16)<br>
return SDValue();<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f32.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-f32.ll?rev=<wbr>329591&r1=329590&r2=329591&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f32.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f32.ll Mon Apr 9 09:56:32 2018<br>
@@ -3,9 +3,9 @@<br>
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s<br>
<br>
; Testing for ds_read/write_128<br>
-; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}load_f32_local:<br>
; SICIVI: s_mov_b32 m0<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f64.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-f64.ll?rev=<wbr>329591&r1=329590&r2=329591&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f64.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f64.ll Mon Apr 9 09:56:32 2018<br>
@@ -5,8 +5,8 @@<br>
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s<br>
<br>
; Testing for ds_read_b128<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_f64:<br>
; SICIV: s_mov_b32 m0<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i16.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-i16.ll?rev=<wbr>329591&r1=329590&r2=329591&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i16.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i16.ll Mon Apr 9 09:56:32 2018<br>
@@ -4,8 +4,8 @@<br>
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
<br>
; Testing for ds_read/write_b128<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_i16:<br>
; GFX9-NOT: m0<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i32.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-i32.ll?rev=<wbr>329591&r1=329590&r2=329591&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i32.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i32.ll Mon Apr 9 09:56:32 2018<br>
@@ -4,9 +4,9 @@<br>
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
<br>
; Testing for ds_read/write_128<br>
-; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_i32:<br>
; GCN-NOT: s_wqm_b64<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i64.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-i64.ll?rev=<wbr>329591&r1=329590&r2=329591&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i64.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i64.ll Mon Apr 9 09:56:32 2018<br>
@@ -5,8 +5,8 @@<br>
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s<br>
<br>
; Testing for ds_read/write_b128<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_i64:<br>
; SICIVI: s_mov_b32 m0<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i8.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll?rev=329591&r1=329590&r2=329591&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-i8.ll?rev=<wbr>329591&r1=329590&r2=329591&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i8.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i8.ll Mon Apr 9 09:56:32 2018<br>
@@ -4,8 +4,8 @@<br>
; RUN: llc -march=r600 -mtriple=r600---amdgiz -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
<br>
; Testing for ds_read/write_b128<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_i8:<br>
; GCN-NOT: s_wqm_b64<br>
<br>
<br>
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</blockquote></div><br></div>
</div></div></blockquote></div><br></div>