[PATCH] D45380: [X86] Add SchedWrites for CMOV and SETCC. Use them to remove InstRWs.

[Ganesh Gopalasubramanian via Phabricator via llvm-commits]

GGanesh added inline comments.


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Comment at: lib/Target/X86/X86ScheduleZnver1.td:620
+// FIXME why doesn't this need an AGU?
 def : InstRW<[WriteShift],
              (instregex "SET(O|NO|B|AE|E|NE|BE|A|S|NS|P|NP|L|GE|LE|G)m")>;
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RKSimon wrote:
> @craig.topper  You can probably fold this into the WriteSETCC declarations above and move the FIXME question there.
> 
> @GGanesh shouldn't this have a ZnAGU dependency?
Yes all memory instructions have dependency with address generation unit!


Repository:
  rL LLVM

https://reviews.llvm.org/D45380