[PATCH] D45380: [X86] Add SchedWrites for CMOV and SETCC. Use them to remove InstRWs.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: lib/Target/X86/X86ScheduleBtVer2.td:145
+defm : JWriteResIntPair<WriteCMOV,  [JALU01], 1>; // Conditional move.
+def  : WriteRes<WriteSETCC, [JALU01]>; // Setcc.
+
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RKSimon wrote:
> Move the WriteSETCCStore def into the models so we don't get the regression on btver2 tests?
You mean make it a regular SchedWrite and not a WriteSequence?


Repository:
  rL LLVM

https://reviews.llvm.org/D45380