[PATCH] D45229: [MI-sched] schedule following instruction latencies

Javed Absar via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 3 23:43:24 PDT 2018

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javed.absar added a comment.

Clubbing all loads together wont be good for performance, especially processors with limited LdSt unit(s) capabilities.


https://reviews.llvm.org/D45229

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