[PATCH] D44972: [X86] Add SchedRW for PMULLD

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 140289.
craig.topper added a comment.

Remove 128-bit memory instructions from most of the models. Didn't touch Skylake Server because there are many things about it that I don't understand.


https://reviews.llvm.org/D44972

Files:
  lib/Target/X86/X86InstrAVX512.td
  lib/Target/X86/X86InstrSSE.td
  lib/Target/X86/X86SchedBroadwell.td
  lib/Target/X86/X86SchedHaswell.td
  lib/Target/X86/X86SchedSandyBridge.td
  lib/Target/X86/X86SchedSkylakeClient.td
  lib/Target/X86/X86SchedSkylakeServer.td
  lib/Target/X86/X86Schedule.td
  lib/Target/X86/X86ScheduleBtVer2.td
  lib/Target/X86/X86ScheduleSLM.td
  lib/Target/X86/X86ScheduleZnver1.td
  test/CodeGen/X86/avx2-schedule.ll
  test/CodeGen/X86/slow-pmulld.ll
  test/CodeGen/X86/sse41-schedule.ll
  test/tools/llvm-mca/X86/BtVer2/pipes-fpu.s
  test/tools/llvm-mca/X86/BtVer2/resources-avx1.s
  test/tools/llvm-mca/X86/BtVer2/resources-sse41.s

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