[PATCH] D44794: [AArch64] Don't reduce the width of loads if it prevents combining a shift
John Brawn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 23 07:50:17 PDT 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL328321: [AArch64] Don't reduce the width of loads if it prevents combining a shift (authored by john.brawn, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D44794?vs=139475&id=139599#toc
Repository:
rL LLVM
https://reviews.llvm.org/D44794
Files:
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h
llvm/trunk/test/CodeGen/AArch64/arm64-fold-lsl.ll
llvm/trunk/test/CodeGen/AArch64/arm64-register-offset-addressing.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D44794.139599.patch
Type: text/x-patch
Size: 13047 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180323/c918d2e9/attachment.bin>
More information about the llvm-commits
mailing list