[llvm] r328289 - [X86] Fix the itinerary for vextractps to match extractps.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 22 23:41:35 PDT 2018


Author: ctopper
Date: Thu Mar 22 23:41:35 2018
New Revision: 328289

URL: http://llvm.org/viewvc/llvm-project?rev=328289&view=rev
Log:
[X86] Fix the itinerary for vextractps to match extractps.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=328289&r1=328288&r2=328289&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Mar 22 23:41:35 2018
@@ -5696,7 +5696,7 @@ defm PEXTRQ      : SS41I_extract64<0x16,
 /// SS41I_extractf32 - SSE 4.1 extract 32 bits fp value to int reg or memory
 /// destination
 multiclass SS41I_extractf32<bits<8> opc, string OpcodeStr,
-                            OpndItins itins = DEFAULT_ITINS> {
+                            OpndItins itins = SSE_EXTRACT_ITINS> {
   def rr : SS4AIi8<opc, MRMDestReg, (outs GR32orGR64:$dst),
                  (ins VR128:$src1, u8imm:$src2),
                  !strconcat(OpcodeStr,
@@ -5716,7 +5716,7 @@ multiclass SS41I_extractf32<bits<8> opc,
 let ExeDomain = SSEPackedSingle in {
   let Predicates = [UseAVX] in
     defm VEXTRACTPS : SS41I_extractf32<0x17, "vextractps">, VEX, VEX_WIG;
-  defm EXTRACTPS   : SS41I_extractf32<0x17, "extractps", SSE_EXTRACT_ITINS>;
+  defm EXTRACTPS   : SS41I_extractf32<0x17, "extractps">;
 }
 
 // Also match an EXTRACTPS store when the store is done as f32 instead of i32.




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