[PATCH] D44687: [SchedModel] Remove instregex entries that don't match any instructions (WIP)

[Javed Absar via Phabricator via llvm-commits]

javed.absar added a comment.

Thanks for this. If I am getting this right, just like CompleteModel ensures no instruction has a missing schedule, this patch will ensure no instruction has multiple schedule (instregex) assigned?



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Comment at: lib/Target/ARM/ARMScheduleR52.td:228
 def : InstRW<[R52WriteLd,R52Read_ISS],
-      (instregex "MOV_ga_pcrel_ldr", "t2MOV_ga_pcrel_ldr")>;
+      (instregex "MOV_ga_pcrel_ldr")>;
 
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Not sure why you removed 't2MOV_ga_pcrel_ldr' ? Is it repeated somewhere else ?


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Comment at: lib/Target/ARM/ARMScheduleR52.td:287
+      "UMAAL", "t2SMLAL", "t2UMLAL",
       "t2SMLALBT", "t2SMLALTB", "t2SMLALTT", "t2SMLALD", "t2SMLALDX",
       "t2SMLSLD", "t2SMLSLDX", "t2UMAAL")>;
----------------
t2MLALBB missing?


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Comment at: utils/TableGen/CodeGenSchedule.cpp:152
+        PrintFatalError(Loc, "instregex has no matches: " + Original);
+#if 0 // TODO
+      if (1 == NumMatches)
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Just wondering why having 'just one match' would be a problem?


Repository:
  rL LLVM

https://reviews.llvm.org/D44687