[llvm] r327980 - [Hexagon] Fix division by zero in machine scheduler
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 20 06:28:46 PDT 2018
Author: kparzysz
Date: Tue Mar 20 06:28:46 2018
New Revision: 327980
URL: http://llvm.org/viewvc/llvm-project?rev=327980&view=rev
Log:
[Hexagon] Fix division by zero in machine scheduler
Modified:
llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp
Modified: llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp?rev=327980&r1=327979&r2=327980&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp Tue Mar 20 06:28:46 2018
@@ -291,7 +291,7 @@ void ConvergingVLIWScheduler::initialize
for (unsigned i = 0, e = MaxPressure.size(); i < e; ++i) {
unsigned Limit = DAG->getRegClassInfo()->getRegPressureSetLimit(i);
HighPressureSets[i] =
- (((float) MaxPressure[i] / (float) Limit) > RPThreshold);
+ ((float) MaxPressure[i] > ((float) Limit * RPThreshold));
}
assert((!ForceTopDown || !ForceBottomUp) &&
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