[PATCH] D44654: [X86][SandyBridge] SBWriteResPair +5cy and +1uop Memory Folds

[Clement Courbet via Phabricator via llvm-commits]

courbet added inline comments.


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Comment at: lib/Target/X86/X86SchedSandyBridge.td:83
 
   // Memory variant also uses a cycle on port 2/3 and adds 4 cycles to the
   // latency.
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Please fix the comment.


Repository:
  rL LLVM

https://reviews.llvm.org/D44654