[PATCH] D43620: [Pipeliner] Fixed node order issue related to zero latency edges
Jan-Willem Roorda via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 9 11:18:48 PST 2018
jwroorda added a comment.
> This change causes some issues. The following testcase crashes or runs until memory is exhausted.
Thanks for the feedback. I have been able to reproduce the issue.
However, I do not think the change necessarily *causes* the issue. Instead, I believe that it exposes an already existing issue.
The node order generated by the change is valid. I believe that the rest of the SWP-algorithm should be able to handle it.
I did some debugging:
For the given example, after the node order is generated, the pipeliner is able to find a schedule with II=1.
However, when the "orderDependence" function is called from inside the "finalizeSchedule" function,
it gets caught in an infinite recursion. This warrants further investigation.
Repository:
rL LLVM
https://reviews.llvm.org/D43620
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