[llvm] r326468 - AMDGPU/GlobalISel: Define instruction mapping for G_FCONSTANT

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Thu Mar  1 11:13:30 2018
New Revision: 326468

URL: http://llvm.org/viewvc/llvm-project?rev=326468&view=rev
Log:
AMDGPU/GlobalISel: Define instruction mapping for G_FCONSTANT

Patch by Tom Stellard

Added:
    llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir
Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp?rev=326468&r1=326467&r2=326468&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp Thu Mar  1 11:13:30 2018
@@ -174,6 +174,7 @@ AMDGPURegisterBankInfo::getInstrMapping(
   default:
     IsComplete = false;
     break;
+  case AMDGPU::G_FCONSTANT:
   case AMDGPU::G_CONSTANT: {
     unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
     OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size);

Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir?rev=326468&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir Thu Mar  1 11:13:30 2018
@@ -0,0 +1,31 @@
+# RUN: llc -O0 -march amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -o - | FileCheck %s
+
+# Check the default mappings for various instructions.
+
+---
+# CHECK-LABEL: name: test_fconstant_f32_1
+name:            test_fconstant_f32_1
+legalized:       true
+body: |
+  bb.0:
+    ; CHECK: %0:sgpr(s32) = G_FCONSTANT float 1.0
+    %0:_(s32) = G_FCONSTANT float 1.0
+...
+---
+# CHECK-LABEL: name: test_fconstant_f64_1
+name:            test_fconstant_f64_1
+legalized:       true
+body: |
+  bb.0:
+    ; CHECK: %0:sgpr(s64) = G_FCONSTANT double 1.0
+    %0:_(s64) = G_FCONSTANT double 1.0
+...
+---
+# CHECK-LABEL: name: test_fconstant_f16_1
+name:            test_fconstant_f16_1
+legalized:       true
+body: |
+  bb.0:
+    ; CHECK: %0:sgpr(s32) = G_FCONSTANT half 0xH3C00
+    %0:_(s32) = G_FCONSTANT half 1.0
+...