[PATCH] D35267: Pass Divergence Analysis data to selection DAG to drive divergence dependent instruction selection

[Alexander via Phabricator via llvm-commits]

alex-t added a comment.

In https://reviews.llvm.org/D35267#1010640, @efriedma wrote:

> I still want a verifier, a function which checks the bits currently saved on SelectionDAG nodes are the same as the bits we would compute from scratch (and calls report_fatal_error() if they aren't).  Maybe call it in a couple places in SelectionDAGISel::CodeGenAndEmitDAG() if assertions are enabled.


It will then assert on the combining x*0 => 0 since the divergence of "*" node is changed from "true" to "false".
We have 2 options:

1. restrict any changes in divergence bits and assert if they changed
2. update rather tan verify bits after combiner/legalizer

I'd vote for the "option 1". Verification has polynomial complexity and would increase compile time and memory consumption significantly. I expect such a checks "OFF" by default.


https://reviews.llvm.org/D35267