[PATCH] D42896: [SelectionDAG] Add initial implementation of TargetLowering::SimplifyDemandedVectorElts

Zvi Rackover via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 14 07:21:45 PST 2018


zvi added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:1317
+      KnownUndef.setAllBits();
+      return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT));
+    }
----------------
Is this case is covered by tests?


================
Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:1393
+  }
+  case ISD::VECTOR_SHUFFLE: {
+    ArrayRef<int> ShuffleMask = cast<ShuffleVectorSDNode>(Op)->getMask();
----------------
Just wondering how an existing VECTOR_SHUFFLE DAGCombiner simplification, such as shuffle(splat) -> splat, relates to this analysis.
Would it be more powerful to move it here? Should the existing DAGCombiner simplification use this analysis or neither because this analysis+simplification will indirectly make the DAGCombiner simplification more powerful?


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:28192
 
+bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
+    SDValue Op, const APInt &DemandedElts, APInt &KnownUndef, APInt &KnownZero,
----------------
Sorry if i'm missing here something obvious, but is this overload needed?


Repository:
  rL LLVM

https://reviews.llvm.org/D42896





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