[PATCH] D42896: [SelectionDAG] Add initial implementation of TargetLowering::SimplifyDemandedVectorElts

Zvi Rackover via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 14 06:46:12 PST 2018


zvi added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:1345
+        KnownUndef.setBit(i);
+      } else if (EltSizeInBits == SrcOp.getScalarValueSizeInBits() &&
+                 (isNullConstant(SrcOp) || isNullFPConstant(SrcOp))) {
----------------
Another signed/unsigned compare mismatch


================
Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:1403
+        continue;
+      assert(0 <= M && M < (2 * NumElts) && "Shuffle index out of range");
+      if (M < NumElts)
----------------
signed/unsigned compare mismatch


================
Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:1425
+        KnownUndef.setBit(i);
+      } else if (M < NumElts) {
+        if (UndefLHS[M])
----------------
here too


Repository:
  rL LLVM

https://reviews.llvm.org/D42896





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