[PATCH] D42981: [COST] Fix cost model of load instructions on X86

[Alexey Bataev via Phabricator via llvm-commits]

ABataev added inline comments.


================
Comment at: lib/Target/X86/X86TargetTransformInfo.cpp:1824
+           !isa<LoadInst>(I->getOperand(1)) || I->getOperand(0) == OpI;
+  case Instruction::Mul:
+    return (!isa<LoadInst>(I->getOperand(0)) ||
----------------
RKSimon wrote:
> A little tricky, but we only fold certain operands (Operand(1) typically) so if it doesn't commute then we can't fold - ISD::SUB/FSUB/FDIV/SHL/ASHR/LSHR will all definitely be affected by this.
> 
> Also we need to handle the case where both operands are loads - we will still have at least one load cost.
1. Agree, missed it. Will be fixed.
2. Yes, it is handled already. The additional checks here are exactly to check this situation.


Repository:
  rL LLVM

https://reviews.llvm.org/D42981