[PATCH] D42982: AMDGPU: Select BFI patterns with 64-bit ints

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/SIInstructions.td:1491
 defm : BFEPattern <V_BFE_U32, V_BFE_I32, S_MOV_B32>;
-def : SHA256MaPattern <V_BFI_B32, V_XOR_B32_e64>;
+defm : SHA256MaPattern <V_BFI_B32, V_XOR_B32_e64, SReg_64>;
 
----------------
rampitec wrote:
> Does SReg_64 use mean we could potentially produce illegal scalar result from vector input?
> Can we have at least one test where source will depend on a tid?
No, this will be replaced later anyway. The tests already check VGPR and SGPR sources, with regular functions all of the arguments are VGPRs.


https://reviews.llvm.org/D42982