[PATCH] D42982: AMDGPU: Select BFI patterns with 64-bit ints

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: lib/Target/AMDGPU/SIInstructions.td:1491
 defm : BFEPattern <V_BFE_U32, V_BFE_I32, S_MOV_B32>;
-def : SHA256MaPattern <V_BFI_B32, V_XOR_B32_e64>;
+defm : SHA256MaPattern <V_BFI_B32, V_XOR_B32_e64, SReg_64>;
 
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Does SReg_64 use mean we could potentially produce illegal scalar result from vector input?
Can we have at least one test where source will depend on a tid?


https://reviews.llvm.org/D42982