[PATCH] D35267: Pass Divergence Analysis data to selection DAG to drive divergence dependent instruction selection

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 5 11:49:44 PST 2018


rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:781
+        if (RI->isPhysicalRegister(Reg)) {
+          return RI->getRegClass(AMDGPU::VGPR_32RegClassID)->contains(Reg) ||
+            RI->getRegClass(AMDGPU::VReg_64RegClassID)->contains(Reg) ||
----------------
SIRegisterInfo::isVGPR()


================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:794
+            return true;
+          return DA->isDivergent(FLI->getValueFromVirtualReg(Reg));
+        }
----------------
!DA || DA->isDivergent(...)

You are using getAnalysisIfAvailable, so it can be missing.


================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:813
+      switch (IntrID) {
+        case Intrinsic::amdgcn_workitem_id_x:
+        case Intrinsic::amdgcn_workitem_id_y:
----------------
Can you make isIntrinsicSourceOfDivergence() external and use it instead?


https://reviews.llvm.org/D35267





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