[PATCH] D35267: Pass Divergence Analysis data to selection DAG to drive divergence dependent instruction selection

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:781
+        if (RI->isPhysicalRegister(Reg)) {
+          return RI->getRegClass(AMDGPU::VGPR_32RegClassID)->contains(Reg) ||
+            RI->getRegClass(AMDGPU::VReg_64RegClassID)->contains(Reg) ||
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SIRegisterInfo::isVGPR()


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Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:794
+            return true;
+          return DA->isDivergent(FLI->getValueFromVirtualReg(Reg));
+        }
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!DA || DA->isDivergent(...)

You are using getAnalysisIfAvailable, so it can be missing.


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Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:813
+      switch (IntrID) {
+        case Intrinsic::amdgcn_workitem_id_x:
+        case Intrinsic::amdgcn_workitem_id_y:
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Can you make isIntrinsicSourceOfDivergence() external and use it instead?


https://reviews.llvm.org/D35267