[PATCH] D42741: [X86] Generate testl instruction through truncates.
Nirav Dave via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 31 09:45:33 PST 2018
niravd accepted this revision.
niravd added a comment.
This revision is now accepted and ready to land.
LGTM modulo comment nit.
================
Comment at: lib/Target/X86/X86ISelDAGToDAG.cpp:3074
+ Op = X86::TEST16ri;
+ } else if (isUInt<32>(Mask) && N0.getValueType() != MVT::i16 &&
+ (!(Mask & 0x80000000) || hasNoSignedComparisonUses(Node))) {
----------------
deadalnix wrote:
> We check more i16 here to avoid running into the same problem we did before.
The i16 comparision took me a moment to understand. Can you leave a comment here explaining that N0 must be of size at least i32?
Repository:
rL LLVM
https://reviews.llvm.org/D42741
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