[PATCH] D42741: [X86] Generate testl instruction through truncates.

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix added a comment.

@niravd I added a test case in https://reviews.llvm.org/rL323868 . The problem was by trying to extract the lower 32 bits of a 16 bit register, which is obviously not possible.



================
Comment at: lib/Target/X86/X86ISelDAGToDAG.cpp:3049
         N0.getNode()->hasOneUse() &&
         N0.getValueType() != MVT::i8 &&
         X86::isZeroNode(N1)) {
----------------
The problem doesn't happen with i8 because it is checked here.


================
Comment at: lib/Target/X86/X86ISelDAGToDAG.cpp:3074
+        Op = X86::TEST16ri;
+      } else if (isUInt<32>(Mask) && N0.getValueType() != MVT::i16 &&
+                 (!(Mask & 0x80000000) || hasNoSignedComparisonUses(Node))) {
----------------
We check more i16 here to avoid running into the same problem we did before.


Repository:
  rL LLVM

https://reviews.llvm.org/D42741