[llvm] r323676 - [MachineVerifier] Add check that renamable operands aren't reserved registers.

[Geoff Berry via llvm-commits]

Author: gberry
Date: Mon Jan 29 10:57:07 2018
New Revision: 323676

URL: http://llvm.org/viewvc/llvm-project?rev=323676&view=rev
Log:
[MachineVerifier] Add check that renamable operands aren't reserved registers.

Summary:

Reviewers: qcolombet, MatzeB

Subscribers: arsenm, sdardis, nhaehnle, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D42449

Modified:
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=323676&r1=323675&r2=323676&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Mon Jan 29 10:57:07 2018
@@ -1101,12 +1101,14 @@ MachineVerifier::visitMachineOperand(con
           }
         }
       }
-      if (MO->isRenamable() &&
-          ((MO->isDef() && MI->hasExtraDefRegAllocReq()) ||
-           (MO->isUse() && MI->hasExtraSrcRegAllocReq()))) {
-        report("Illegal isRenamable setting for opcode with extra regalloc "
-               "requirements",
-               MO, MONum);
+      if (MO->isRenamable()) {
+        if ((MO->isDef() && MI->hasExtraDefRegAllocReq()) ||
+            (MO->isUse() && MI->hasExtraSrcRegAllocReq()))
+          report("Illegal isRenamable setting for opcode with extra regalloc "
+                 "requirements",
+                 MO, MONum);
+        if (MRI->isReserved(Reg))
+          report("isRenamable set on reserved register", MO, MONum);
         return;
       }
     } else {