[PATCH] D42616: [X86] Emit 15-byte NOPs on recent AMD targets, else default to 10-byte NOPs (PR22965)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

I can add the feature flag to Bobcat no problem - although the only place I can find any confirmation that its OK is in Agner's microarch doc. We don't have the Via Nano cpu targets any more.

What about the 11-byte NOPs for bdver - worth doing even though we'll either need to hijack FeatureXOP or use up another feature bit?

Not sure on padding through prefix/imm-extension - @craig.topper @spatel any ideas? We've recently been trying harder to reduce the size of immediates.......


Repository:
  rL LLVM

https://reviews.llvm.org/D42616