[PATCH] D42565: [ARM][GISel] PR35965 Constrain RegClasses of nested instructions built from Dst Pattern

[Roman Tereshin via Phabricator via llvm-commits]

rtereshin added inline comments.


================
Comment at: lib/CodeGen/GlobalISel/Utils.cpp:56-59
+  // Some of the instructions, like COPY, may not impose any register class
+  // constraints on some of their operands:
+  if (!RegClass)
+    return Reg;
----------------
dsanders wrote:
> This is a bit more general than I'd like. I agree that TargetOpcodes like COPY shouldn't fail, but I think GenericOpcodes and target specific instructions should. Could you `assert(!isPreISelGenericOpcode() && !isTargetSpecificOpcode())` inside this if-statement?
Sure! That's just what I needed to know: how to describe in a generic way all the instructions like `COPY` here, huge thanks!


Repository:
  rL LLVM

https://reviews.llvm.org/D42565