[PATCH] D42565: [ARM][GISel] PR35965 Constrain RegClasses of nested instructions built from Dst Pattern

[Daniel Sanders via Phabricator via llvm-commits]

dsanders added a comment.

LGTM with a nit. Thanks for looking into this.



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Comment at: lib/CodeGen/GlobalISel/Utils.cpp:56-59
+  // Some of the instructions, like COPY, may not impose any register class
+  // constraints on some of their operands:
+  if (!RegClass)
+    return Reg;
----------------
This is a bit more general than I'd like. I agree that TargetOpcodes like COPY shouldn't fail, but I think GenericOpcodes and target specific instructions should. Could you `assert(!isPreISelGenericOpcode() && !isTargetSpecificOpcode())` inside this if-statement?


Repository:
  rL LLVM

https://reviews.llvm.org/D42565