[llvm] r323500 - [X86] Remove some dead code from LowerVSETCC. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 25 23:15:16 PST 2018


Author: ctopper
Date: Thu Jan 25 23:15:16 2018
New Revision: 323500

URL: http://llvm.org/viewvc/llvm-project?rev=323500&view=rev
Log:
[X86] Remove some dead code from LowerVSETCC. NFC

This code was added in r321967, but ultimately I fixed the issue in the legalizer and this code was no longer required.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=323500&r1=323499&r2=323500&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Jan 25 23:15:16 2018
@@ -17851,19 +17851,6 @@ static SDValue LowerVSETCC(SDValue Op, c
     assert(EltVT == MVT::f32 || EltVT == MVT::f64);
 #endif
 
-    // Custom widen MVT::v2f32 to prevent the default widening
-    // from getting a result type of v4i32, extracting it to v2i32 and then
-    // trying to sign extend that to v2i1.
-    if (VT == MVT::v2i1 && Op1.getValueType() == MVT::v2f32) {
-      Op0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v4f32, Op0,
-                        DAG.getUNDEF(MVT::v2f32));
-      Op1 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v4f32, Op1,
-                        DAG.getUNDEF(MVT::v2f32));
-      SDValue NewOp = DAG.getNode(ISD::SETCC, dl, MVT::v4i1, Op0, Op1, CC);
-      return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v2i1, NewOp,
-                         DAG.getIntPtrConstant(0, dl));
-    }
-
     unsigned Opc;
     if (Subtarget.hasAVX512() && VT.getVectorElementType() == MVT::i1) {
       assert(VT.getVectorNumElements() <= 16);




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