[PATCH] D41651: AMDGPU: Add 32-bit constant address space
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 25 12:20:26 PST 2018
arsenm added a comment.
In https://reviews.llvm.org/D41651#988249, @mareko wrote:
> In https://reviews.llvm.org/D41651#986619, @nhaehnle wrote:
>
> > This needs documentation in AMDGPUUsage.rst.
> >
> > Relying on metadata for correctness is indeed not okay. We should either say that CONSTANT_ADDRESS_32BIT just assumes uniformness, and move the address to an SGPR (via v_readfirstlane) if required, *or* support this also with VMEM instructions.
>
>
> Here is why relying on metadata is OK.
>
> The behavior of 64-bit pointers:
>
> - If the address is in VGPRs and amdgpu.uniform is not dropped, you'll get readfirstlane and correct behavior.
> - If the address is in VGPRs and amdgpu.uniform is dropped by a random pass, you'll get SMEM opcodes reading descriptors from VGPRs, so you'll get an invalid binary without an error and a GPU hang.
>
> The behavior for 32-bit pointers:
> - If the address is in VGPRs and amdgpu.uniform is not dropped, you'll get readfirstlane and correct behavior.
> - If the address is in VGPRs and amdgpu.uniform is dropped by a random pass, you'll get a compile error.
This is exactly why it's not OK? If it's dropped you get a compile error or miscompile
Repository:
rL LLVM
https://reviews.llvm.org/D41651
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