[llvm] r323351 - [X86] Remove '(_REV)?' from a bunch of scheduler regular expressions. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 24 09:58:43 PST 2018


Author: ctopper
Date: Wed Jan 24 09:58:42 2018
New Revision: 323351

URL: http://llvm.org/viewvc/llvm-project?rev=323351&view=rev
Log:
[X86] Remove '(_REV)?' from a bunch of scheduler regular expressions. NFC

The regexs are treated as a prefix match already so the checking for optional text at the end provides no value. Instead it prevents the binary search optimization in tablegen from kicking in due to the top level question mark.

Modified:
    llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
    llvm/trunk/lib/Target/X86/X86SchedHaswell.td
    llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td
    llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td
    llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td

Modified: llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedBroadwell.td?rev=323351&r1=323350&r2=323351&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedBroadwell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedBroadwell.td Wed Jan 24 09:58:42 2018
@@ -406,18 +406,18 @@ def: InstRW<[BWWriteResGroup3], (instreg
 def: InstRW<[BWWriteResGroup3], (instregex "MMX_PUNPCKLDQirr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "MMX_PUNPCKLWDirr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "MOV64toPQIrr")>;
-def: InstRW<[BWWriteResGroup3], (instregex "MOVAPDrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "MOVAPSrr(_REV)?")>;
+def: InstRW<[BWWriteResGroup3], (instregex "MOVAPDrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "MOVAPSrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "MOVDDUPrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "MOVDI2PDIrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "MOVHLPSrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "MOVLHPSrr")>;
-def: InstRW<[BWWriteResGroup3], (instregex "MOVSDrr(_REV)?")>;
+def: InstRW<[BWWriteResGroup3], (instregex "MOVSDrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "MOVSHDUPrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "MOVSLDUPrr")>;
-def: InstRW<[BWWriteResGroup3], (instregex "MOVSSrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "MOVUPDrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "MOVUPSrr(_REV)?")>;
+def: InstRW<[BWWriteResGroup3], (instregex "MOVSSrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "MOVUPDrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "MOVUPSrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "ORPDrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "ORPSrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "PACKSSDWrr")>;
@@ -469,25 +469,25 @@ def: InstRW<[BWWriteResGroup3], (instreg
 def: InstRW<[BWWriteResGroup3], (instregex "VBROADCASTSSrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VINSERTPSrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOV64toPQIrr")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVAPDYrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVAPDrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVAPSYrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVAPSrr(_REV)?")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVAPDYrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVAPDrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVAPSYrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVAPSrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOVDDUPYrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOVDDUPrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOVDI2PDIrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOVHLPSrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOVLHPSrr")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVSDrr(_REV)?")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVSDrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOVSHDUPYrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOVSHDUPrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOVSLDUPYrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VMOVSLDUPrr")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVSSrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVUPDYrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVUPDrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVUPSYrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup3], (instregex "VMOVUPSrr(_REV)?")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVSSrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVUPDYrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVUPDrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVUPSYrr")>;
+def: InstRW<[BWWriteResGroup3], (instregex "VMOVUPSrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VORPDYrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VORPDrr")>;
 def: InstRW<[BWWriteResGroup3], (instregex "VORPSYrr")>;
@@ -594,8 +594,8 @@ def BWWriteResGroup6 : SchedWriteRes<[BW
   let ResourceCycles = [1];
 }
 def: InstRW<[BWWriteResGroup6], (instregex "ADC(16|32|64)ri")>;
-def: InstRW<[BWWriteResGroup6], (instregex "ADC(16|32|64)rr(_REV)?")>;
-def: InstRW<[BWWriteResGroup6], (instregex "ADC8rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup6], (instregex "ADC(16|32|64)rr")>;
+def: InstRW<[BWWriteResGroup6], (instregex "ADC8rr")>;
 def: InstRW<[BWWriteResGroup6], (instregex "ADCX(32|64)rr")>;
 def: InstRW<[BWWriteResGroup6], (instregex "ADOX(32|64)rr")>;
 def: InstRW<[BWWriteResGroup6], (instregex "BT(16|32|64)ri8")>;
@@ -620,8 +620,8 @@ def: InstRW<[BWWriteResGroup6], (instreg
 def: InstRW<[BWWriteResGroup6], (instregex "SAR8ri")>;
 def: InstRW<[BWWriteResGroup6], (instregex "SARX(32|64)rr")>;
 def: InstRW<[BWWriteResGroup6], (instregex "SBB(16|32|64)ri")>;
-def: InstRW<[BWWriteResGroup6], (instregex "SBB(16|32|64)rr(_REV)?")>;
-def: InstRW<[BWWriteResGroup6], (instregex "SBB8rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup6], (instregex "SBB(16|32|64)rr")>;
+def: InstRW<[BWWriteResGroup6], (instregex "SBB8rr")>;
 def: InstRW<[BWWriteResGroup6], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)r")>;
 def: InstRW<[BWWriteResGroup6], (instregex "SHL(16|32|64)r1")>;
 def: InstRW<[BWWriteResGroup6], (instregex "SHL(16|32|64)ri")>;
@@ -817,13 +817,13 @@ def BWWriteResGroup8 : SchedWriteRes<[BW
 def: InstRW<[BWWriteResGroup8], (instregex "BLENDPDrri")>;
 def: InstRW<[BWWriteResGroup8], (instregex "BLENDPSrri")>;
 def: InstRW<[BWWriteResGroup8], (instregex "MMX_MOVD64from64rr")>;
-def: InstRW<[BWWriteResGroup8], (instregex "MMX_MOVQ64rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup8], (instregex "MMX_MOVQ64rr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "MMX_PANDNirr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "MMX_PANDirr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "MMX_PORirr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "MMX_PXORirr")>;
-def: InstRW<[BWWriteResGroup8], (instregex "MOVDQArr(_REV)?")>;
-def: InstRW<[BWWriteResGroup8], (instregex "MOVDQUrr(_REV)?")>;
+def: InstRW<[BWWriteResGroup8], (instregex "MOVDQArr")>;
+def: InstRW<[BWWriteResGroup8], (instregex "MOVDQUrr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "MOVPQI2QIrr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "PANDNrr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "PANDrr")>;
@@ -833,10 +833,10 @@ def: InstRW<[BWWriteResGroup8], (instreg
 def: InstRW<[BWWriteResGroup8], (instregex "VBLENDPDrri")>;
 def: InstRW<[BWWriteResGroup8], (instregex "VBLENDPSYrri")>;
 def: InstRW<[BWWriteResGroup8], (instregex "VBLENDPSrri")>;
-def: InstRW<[BWWriteResGroup8], (instregex "VMOVDQAYrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup8], (instregex "VMOVDQArr(_REV)?")>;
-def: InstRW<[BWWriteResGroup8], (instregex "VMOVDQUYrr(_REV)?")>;
-def: InstRW<[BWWriteResGroup8], (instregex "VMOVDQUrr(_REV)?")>;
+def: InstRW<[BWWriteResGroup8], (instregex "VMOVDQAYrr")>;
+def: InstRW<[BWWriteResGroup8], (instregex "VMOVDQArr")>;
+def: InstRW<[BWWriteResGroup8], (instregex "VMOVDQUYrr")>;
+def: InstRW<[BWWriteResGroup8], (instregex "VMOVDQUrr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "VMOVPQI2QIrr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "VMOVZPQILo2PQIrr")>;
 def: InstRW<[BWWriteResGroup8], (instregex "VPANDNYrr")>;
@@ -856,32 +856,32 @@ def BWWriteResGroup9 : SchedWriteRes<[BW
   let ResourceCycles = [1];
 }
 def: InstRW<[BWWriteResGroup9], (instregex "ADD(16|32|64)ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "ADD(16|32|64)rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "ADD(16|32|64)rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "ADD8i8")>;
 def: InstRW<[BWWriteResGroup9], (instregex "ADD8ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "ADD8rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "ADD8rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "AND(16|32|64)ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "AND(16|32|64)rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "AND(16|32|64)rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "AND8i8")>;
 def: InstRW<[BWWriteResGroup9], (instregex "AND8ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "AND8rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "AND8rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "CBW")>;
 def: InstRW<[BWWriteResGroup9], (instregex "CLC")>;
 def: InstRW<[BWWriteResGroup9], (instregex "CMC")>;
 def: InstRW<[BWWriteResGroup9], (instregex "CMP(16|32|64)ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "CMP(16|32|64)rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "CMP(16|32|64)rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "CMP8i8")>;
 def: InstRW<[BWWriteResGroup9], (instregex "CMP8ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "CMP8rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "CMP8rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "CWDE")>;
 def: InstRW<[BWWriteResGroup9], (instregex "DEC(16|32|64)r")>;
 def: InstRW<[BWWriteResGroup9], (instregex "DEC8r")>;
 def: InstRW<[BWWriteResGroup9], (instregex "INC(16|32|64)r")>;
 def: InstRW<[BWWriteResGroup9], (instregex "INC8r")>;
 def: InstRW<[BWWriteResGroup9], (instregex "LAHF")>;
-def: InstRW<[BWWriteResGroup9], (instregex "MOV(16|32|64)rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "MOV(16|32|64)rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "MOV8ri(_alt)?")>;
-def: InstRW<[BWWriteResGroup9], (instregex "MOV8rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "MOV8rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "MOVSX(16|32|64)rr16")>;
 def: InstRW<[BWWriteResGroup9], (instregex "MOVSX(16|32|64)rr32")>;
 def: InstRW<[BWWriteResGroup9], (instregex "MOVSX(16|32|64)rr8")>;
@@ -893,10 +893,10 @@ def: InstRW<[BWWriteResGroup9], (instreg
 def: InstRW<[BWWriteResGroup9], (instregex "NOT(16|32|64)r")>;
 def: InstRW<[BWWriteResGroup9], (instregex "NOT8r")>;
 def: InstRW<[BWWriteResGroup9], (instregex "OR(16|32|64)ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "OR(16|32|64)rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "OR(16|32|64)rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "OR8i8")>;
 def: InstRW<[BWWriteResGroup9], (instregex "OR8ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "OR8rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "OR8rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "SAHF")>;
 def: InstRW<[BWWriteResGroup9], (instregex "SGDT64m")>;
 def: InstRW<[BWWriteResGroup9], (instregex "SIDT64m")>;
@@ -905,10 +905,10 @@ def: InstRW<[BWWriteResGroup9], (instreg
 def: InstRW<[BWWriteResGroup9], (instregex "STC")>;
 def: InstRW<[BWWriteResGroup9], (instregex "STRm")>;
 def: InstRW<[BWWriteResGroup9], (instregex "SUB(16|32|64)ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "SUB(16|32|64)rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "SUB(16|32|64)rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "SUB8i8")>;
 def: InstRW<[BWWriteResGroup9], (instregex "SUB8ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "SUB8rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "SUB8rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "SYSCALL")>;
 def: InstRW<[BWWriteResGroup9], (instregex "TEST(16|32|64)rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "TEST8i8")>;
@@ -916,10 +916,10 @@ def: InstRW<[BWWriteResGroup9], (instreg
 def: InstRW<[BWWriteResGroup9], (instregex "TEST8rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "XCHG(16|32|64)rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "XOR(16|32|64)ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "XOR(16|32|64)rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "XOR(16|32|64)rr")>;
 def: InstRW<[BWWriteResGroup9], (instregex "XOR8i8")>;
 def: InstRW<[BWWriteResGroup9], (instregex "XOR8ri")>;
-def: InstRW<[BWWriteResGroup9], (instregex "XOR8rr(_REV)?")>;
+def: InstRW<[BWWriteResGroup9], (instregex "XOR8rr")>;
 
 def BWWriteResGroup10 : SchedWriteRes<[BWPort4,BWPort237]> {
   let Latency = 1;

Modified: llvm/trunk/lib/Target/X86/X86SchedHaswell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedHaswell.td?rev=323351&r1=323350&r2=323351&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedHaswell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedHaswell.td Wed Jan 24 09:58:42 2018
@@ -980,12 +980,12 @@ def: InstRW<[HWWriteResGroup4], (instreg
 def: InstRW<[HWWriteResGroup4], (instregex "MOVDI2PDIrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "MOVHLPSrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "MOVLHPSrr")>;
-def: InstRW<[HWWriteResGroup4], (instregex "MOVSDrr(_REV)?")>;
+def: InstRW<[HWWriteResGroup4], (instregex "MOVSDrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "MOVSHDUPrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "MOVSLDUPrr")>;
-def: InstRW<[HWWriteResGroup4], (instregex "MOVSSrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup4], (instregex "MOVUPDrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup4], (instregex "MOVUPSrr(_REV)?")>;
+def: InstRW<[HWWriteResGroup4], (instregex "MOVSSrr")>;
+def: InstRW<[HWWriteResGroup4], (instregex "MOVUPDrr")>;
+def: InstRW<[HWWriteResGroup4], (instregex "MOVUPSrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "ORPDrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "ORPSrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "PACKSSDWrr")>;
@@ -1037,25 +1037,25 @@ def: InstRW<[HWWriteResGroup4], (instreg
 def: InstRW<[HWWriteResGroup4], (instregex "VBROADCASTSSrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VINSERTPSrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOV64toPQIrr")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPDYrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPDrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPSYrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPSrr(_REV)?")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPDYrr")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPDrr")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPSYrr")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPSrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOVDDUPYrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOVDDUPrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOVDI2PDIrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOVHLPSrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOVLHPSrr")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVSDrr(_REV)?")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVSDrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOVSHDUPYrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOVSHDUPrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOVSLDUPYrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VMOVSLDUPrr")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVSSrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPDYrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPDrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPSYrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPSrr(_REV)?")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVSSrr")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPDYrr")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPDrr")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPSYrr")>;
+def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPSrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VORPDYrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VORPDrr")>;
 def: InstRW<[HWWriteResGroup4], (instregex "VORPSYrr")>;
@@ -1376,13 +1376,13 @@ def HWWriteResGroup9 : SchedWriteRes<[HW
 def: InstRW<[HWWriteResGroup9], (instregex "BLENDPDrri")>;
 def: InstRW<[HWWriteResGroup9], (instregex "BLENDPSrri")>;
 def: InstRW<[HWWriteResGroup9], (instregex "MMX_MOVD64from64rr")>;
-def: InstRW<[HWWriteResGroup9], (instregex "MMX_MOVQ64rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup9], (instregex "MMX_MOVQ64rr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "MMX_PANDNirr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "MMX_PANDirr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "MMX_PORirr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "MMX_PXORirr")>;
-def: InstRW<[HWWriteResGroup9], (instregex "MOVDQArr(_REV)?")>;
-def: InstRW<[HWWriteResGroup9], (instregex "MOVDQUrr(_REV)?")>;
+def: InstRW<[HWWriteResGroup9], (instregex "MOVDQArr")>;
+def: InstRW<[HWWriteResGroup9], (instregex "MOVDQUrr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "MOVPQI2QIrr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "PANDNrr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "PANDrr")>;
@@ -1392,10 +1392,10 @@ def: InstRW<[HWWriteResGroup9], (instreg
 def: InstRW<[HWWriteResGroup9], (instregex "VBLENDPDrri")>;
 def: InstRW<[HWWriteResGroup9], (instregex "VBLENDPSYrri")>;
 def: InstRW<[HWWriteResGroup9], (instregex "VBLENDPSrri")>;
-def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQAYrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQArr(_REV)?")>;
-def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQUYrr(_REV)?")>;
-def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQUrr(_REV)?")>;
+def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQAYrr")>;
+def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQArr")>;
+def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQUYrr")>;
+def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQUrr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "VMOVPQI2QIrr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "VMOVZPQILo2PQIrr")>;
 def: InstRW<[HWWriteResGroup9], (instregex "VPANDNYrr")>;
@@ -1415,32 +1415,32 @@ def HWWriteResGroup10 : SchedWriteRes<[H
   let ResourceCycles = [1];
 }
 def: InstRW<[HWWriteResGroup10], (instregex "ADD(16|32|64)ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "ADD(16|32|64)rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "ADD(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "ADD8i8")>;
 def: InstRW<[HWWriteResGroup10], (instregex "ADD8ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "ADD8rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "ADD8rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "AND(16|32|64)ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "AND(16|32|64)rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "AND(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "AND8i8")>;
 def: InstRW<[HWWriteResGroup10], (instregex "AND8ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "AND8rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "AND8rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "CBW")>;
 def: InstRW<[HWWriteResGroup10], (instregex "CLC")>;
 def: InstRW<[HWWriteResGroup10], (instregex "CMC")>;
 def: InstRW<[HWWriteResGroup10], (instregex "CMP(16|32|64)ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "CMP(16|32|64)rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "CMP(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "CMP8i8")>;
 def: InstRW<[HWWriteResGroup10], (instregex "CMP8ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "CMP8rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "CMP8rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "CWDE")>;
 def: InstRW<[HWWriteResGroup10], (instregex "DEC(16|32|64)r")>;
 def: InstRW<[HWWriteResGroup10], (instregex "DEC8r")>;
 def: InstRW<[HWWriteResGroup10], (instregex "INC(16|32|64)r")>;
 def: InstRW<[HWWriteResGroup10], (instregex "INC8r")>;
 def: InstRW<[HWWriteResGroup10], (instregex "LAHF")>;
-def: InstRW<[HWWriteResGroup10], (instregex "MOV(16|32|64)rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "MOV(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "MOV8ri(_alt)?")>;
-def: InstRW<[HWWriteResGroup10], (instregex "MOV8rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "MOV8rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "MOVSX(16|32|64)rr16")>;
 def: InstRW<[HWWriteResGroup10], (instregex "MOVSX(16|32|64)rr32")>;
 def: InstRW<[HWWriteResGroup10], (instregex "MOVSX(16|32|64)rr8")>;
@@ -1452,10 +1452,10 @@ def: InstRW<[HWWriteResGroup10], (instre
 def: InstRW<[HWWriteResGroup10], (instregex "NOT(16|32|64)r")>;
 def: InstRW<[HWWriteResGroup10], (instregex "NOT8r")>;
 def: InstRW<[HWWriteResGroup10], (instregex "OR(16|32|64)ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "OR(16|32|64)rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "OR(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "OR8i8")>;
 def: InstRW<[HWWriteResGroup10], (instregex "OR8ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "OR8rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "OR8rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "SAHF")>;
 def: InstRW<[HWWriteResGroup10], (instregex "SGDT64m")>;
 def: InstRW<[HWWriteResGroup10], (instregex "SIDT64m")>;
@@ -1464,10 +1464,10 @@ def: InstRW<[HWWriteResGroup10], (instre
 def: InstRW<[HWWriteResGroup10], (instregex "STC")>;
 def: InstRW<[HWWriteResGroup10], (instregex "STRm")>;
 def: InstRW<[HWWriteResGroup10], (instregex "SUB(16|32|64)ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "SUB(16|32|64)rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "SUB(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "SUB8i8")>;
 def: InstRW<[HWWriteResGroup10], (instregex "SUB8ri")>;
-def: InstRW<[HWWriteResGroup10], (instregex "SUB8rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup10], (instregex "SUB8rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "SYSCALL")>;
 def: InstRW<[HWWriteResGroup10], (instregex "TEST(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup10], (instregex "TEST8i8")>;
@@ -2286,18 +2286,18 @@ def HWWriteResGroup35 : SchedWriteRes<[H
   let ResourceCycles = [1,1];
 }
 def: InstRW<[HWWriteResGroup35], (instregex "ADC(16|32|64)ri")>;
-def: InstRW<[HWWriteResGroup35], (instregex "ADC(16|32|64)rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup35], (instregex "ADC(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup35], (instregex "ADC8i8")>;
 def: InstRW<[HWWriteResGroup35], (instregex "ADC8ri")>;
-def: InstRW<[HWWriteResGroup35], (instregex "ADC8rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup35], (instregex "ADC8rr")>;
 def: InstRW<[HWWriteResGroup35], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup35], (instregex "CWD")>;
 def: InstRW<[HWWriteResGroup35], (instregex "JRCXZ")>;
 def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)ri")>;
-def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)rr")>;
 def: InstRW<[HWWriteResGroup35], (instregex "SBB8i8")>;
 def: InstRW<[HWWriteResGroup35], (instregex "SBB8ri")>;
-def: InstRW<[HWWriteResGroup35], (instregex "SBB8rr(_REV)?")>;
+def: InstRW<[HWWriteResGroup35], (instregex "SBB8rr")>;
 def: InstRW<[HWWriteResGroup35], (instregex "SET(A|BE)r")>;
 
 def HWWriteResGroup36 : SchedWriteRes<[HWPort5,HWPort23]> {

Modified: llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td?rev=323351&r1=323350&r2=323351&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td Wed Jan 24 09:58:42 2018
@@ -380,11 +380,11 @@ def: InstRW<[SKLWriteResGroup3], (instre
 def: InstRW<[SKLWriteResGroup3], (instregex "MOVDI2PDIrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "MOVHLPSrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "MOVLHPSrr")>;
-def: InstRW<[SKLWriteResGroup3], (instregex "MOVSDrr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup3], (instregex "MOVSDrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "MOVSHDUPrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "MOVSLDUPrr")>;
-def: InstRW<[SKLWriteResGroup3], (instregex "MOVUPDrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup3], (instregex "MOVUPSrr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup3], (instregex "MOVUPDrr")>;
+def: InstRW<[SKLWriteResGroup3], (instregex "MOVUPSrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "PACKSSDWrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "PACKSSWBrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "PACKUSDWrr")>;
@@ -433,15 +433,15 @@ def: InstRW<[SKLWriteResGroup3], (instre
 def: InstRW<[SKLWriteResGroup3], (instregex "VMOVDI2PDIrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "VMOVHLPSrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "VMOVLHPSrr")>;
-def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSDrr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSDrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSHDUPYrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSHDUPrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSLDUPYrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSLDUPrr")>;
-def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPDYrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPDrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPSYrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPSrr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPDYrr")>;
+def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPDrr")>;
+def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPSYrr")>;
+def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPSrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "VPACKSSDWYrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "VPACKSSDWrr")>;
 def: InstRW<[SKLWriteResGroup3], (instregex "VPACKSSWBYrr")>;
@@ -676,7 +676,7 @@ def SKLWriteResGroup6 : SchedWriteRes<[S
 }
 def: InstRW<[SKLWriteResGroup6], (instregex "FINCSTP")>;
 def: InstRW<[SKLWriteResGroup6], (instregex "FNOP")>;
-def: InstRW<[SKLWriteResGroup6], (instregex "MMX_MOVQ64rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup6], (instregex "MMX_MOVQ64rr")>;
 def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PABSBrr64")>;
 def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PABSDrr64")>;
 def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PABSWrr64")>;
@@ -702,8 +702,8 @@ def SKLWriteResGroup7 : SchedWriteRes<[S
   let ResourceCycles = [1];
 }
 def: InstRW<[SKLWriteResGroup7], (instregex "ADC(16|32|64)ri")>;
-def: InstRW<[SKLWriteResGroup7], (instregex "ADC(16|32|64)rr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup7], (instregex "ADC8rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup7], (instregex "ADC(16|32|64)rr")>;
+def: InstRW<[SKLWriteResGroup7], (instregex "ADC8rr")>;
 def: InstRW<[SKLWriteResGroup7], (instregex "ADCX(32|64)rr")>;
 def: InstRW<[SKLWriteResGroup7], (instregex "ADOX(32|64)rr")>;
 def: InstRW<[SKLWriteResGroup7], (instregex "BT(16|32|64)ri8")>;
@@ -729,8 +729,8 @@ def: InstRW<[SKLWriteResGroup7], (instre
 def: InstRW<[SKLWriteResGroup7], (instregex "SAR8ri")>;
 def: InstRW<[SKLWriteResGroup7], (instregex "SARX(32|64)rr")>;
 def: InstRW<[SKLWriteResGroup7], (instregex "SBB(16|32|64)ri")>;
-def: InstRW<[SKLWriteResGroup7], (instregex "SBB(16|32|64)rr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup7], (instregex "SBB8rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup7], (instregex "SBB(16|32|64)rr")>;
+def: InstRW<[SKLWriteResGroup7], (instregex "SBB8rr")>;
 def: InstRW<[SKLWriteResGroup7], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)r")>;
 def: InstRW<[SKLWriteResGroup7], (instregex "SHL(16|32|64)r1")>;
 def: InstRW<[SKLWriteResGroup7], (instregex "SHL(16|32|64)ri")>;
@@ -768,12 +768,12 @@ def: InstRW<[SKLWriteResGroup9], (instre
 def: InstRW<[SKLWriteResGroup9], (instregex "BLENDPDrri")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "BLENDPSrri")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "MMX_MOVD64from64rr")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "MOVAPDrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "MOVAPSrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "MOVDQArr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "MOVDQUrr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "MOVAPDrr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "MOVAPSrr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "MOVDQArr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "MOVDQUrr")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "MOVPQI2QIrr")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "MOVSSrr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "MOVSSrr")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "ORPDrr")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "ORPSrr")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "PADDBrr")>;
@@ -800,16 +800,16 @@ def: InstRW<[SKLWriteResGroup9], (instre
 def: InstRW<[SKLWriteResGroup9], (instregex "VBLENDPDrri")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "VBLENDPSYrri")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "VBLENDPSrri")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPDYrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPDrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPSYrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPSrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQAYrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQArr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQUYrr(_REV)?")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQUrr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPDYrr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPDrr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPSYrr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPSrr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQAYrr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQArr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQUYrr")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQUrr")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "VMOVPQI2QIrr")>;
-def: InstRW<[SKLWriteResGroup9], (instregex "VMOVSSrr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup9], (instregex "VMOVSSrr")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "VMOVZPQILo2PQIrr")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "VORPDYrr")>;
 def: InstRW<[SKLWriteResGroup9], (instregex "VORPDrr")>;
@@ -854,32 +854,32 @@ def SKLWriteResGroup10 : SchedWriteRes<[
   let ResourceCycles = [1];
 }
 def: InstRW<[SKLWriteResGroup10], (instregex "ADD(16|32|64)ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "ADD(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "ADD(16|32|64)rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "ADD8i8")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "ADD8ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "ADD8rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "ADD8rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "AND(16|32|64)ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "AND(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "AND(16|32|64)rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "AND8i8")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "AND8ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "AND8rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "AND8rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "CBW")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "CLC")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "CMC")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "CMP(16|32|64)ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "CMP(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "CMP(16|32|64)rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "CMP8i8")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "CMP8ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "CMP8rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "CMP8rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "CWDE")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "DEC(16|32|64)r")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "DEC8r")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "INC(16|32|64)r")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "INC8r")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "LAHF")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "MOV(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "MOV(16|32|64)rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "MOV8ri(_alt)?")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "MOV8rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "MOV8rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "MOVSX(16|32|64)rr16")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "MOVSX(16|32|64)rr32")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "MOVSX(16|32|64)rr8")>;
@@ -891,10 +891,10 @@ def: InstRW<[SKLWriteResGroup10], (instr
 def: InstRW<[SKLWriteResGroup10], (instregex "NOT(16|32|64)r")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "NOT8r")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "OR(16|32|64)ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "OR(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "OR(16|32|64)rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "OR8i8")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "OR8ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "OR8rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "OR8rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "SAHF")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "SGDT64m")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "SIDT64m")>;
@@ -903,10 +903,10 @@ def: InstRW<[SKLWriteResGroup10], (instr
 def: InstRW<[SKLWriteResGroup10], (instregex "STC")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "STRm")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "SUB(16|32|64)ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "SUB(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "SUB(16|32|64)rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "SUB8i8")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "SUB8ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "SUB8rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "SUB8rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "SYSCALL")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "TEST(16|32|64)rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "TEST8i8")>;
@@ -914,10 +914,10 @@ def: InstRW<[SKLWriteResGroup10], (instr
 def: InstRW<[SKLWriteResGroup10], (instregex "TEST8rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "XCHG(16|32|64)rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "XOR(16|32|64)ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "XOR(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "XOR(16|32|64)rr")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "XOR8i8")>;
 def: InstRW<[SKLWriteResGroup10], (instregex "XOR8ri")>;
-def: InstRW<[SKLWriteResGroup10], (instregex "XOR8rr(_REV)?")>;
+def: InstRW<[SKLWriteResGroup10], (instregex "XOR8rr")>;
 
 def SKLWriteResGroup11 : SchedWriteRes<[SKLPort4,SKLPort237]> {
   let Latency = 1;

Modified: llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td?rev=323351&r1=323350&r2=323351&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td Wed Jan 24 09:58:42 2018
@@ -424,11 +424,11 @@ def: InstRW<[SKXWriteResGroup3], (instre
 def: InstRW<[SKXWriteResGroup3], (instregex "MOVDI2PDIrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "MOVHLPSrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "MOVLHPSrr")>;
-def: InstRW<[SKXWriteResGroup3], (instregex "MOVSDrr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup3], (instregex "MOVSDrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "MOVSHDUPrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "MOVSLDUPrr")>;
-def: InstRW<[SKXWriteResGroup3], (instregex "MOVUPDrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup3], (instregex "MOVUPSrr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup3], (instregex "MOVUPDrr")>;
+def: InstRW<[SKXWriteResGroup3], (instregex "MOVUPSrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "PACKSSDWrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "PACKSSWBrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "PACKUSDWrr")>;
@@ -487,7 +487,7 @@ def: InstRW<[SKXWriteResGroup3], (instre
 def: InstRW<[SKXWriteResGroup3], (instregex "VMOVLHPSZrr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VMOVLHPSrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSDZrr(b?)(k?)(z?)")>;
-def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSDrr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSDrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSHDUPYrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSHDUPZ128rr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSHDUPZ256rr(b?)(k?)(z?)")>;
@@ -498,11 +498,11 @@ def: InstRW<[SKXWriteResGroup3], (instre
 def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSLDUPZ256rr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSLDUPZrr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSLDUPrr")>;
-def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSSZrr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup3], (instregex "VMOVUPDYrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup3], (instregex "VMOVUPDrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup3], (instregex "VMOVUPSYrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup3], (instregex "VMOVUPSrr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup3], (instregex "VMOVSSZrr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup3], (instregex "VMOVUPDYrr")>;
+def: InstRW<[SKXWriteResGroup3], (instregex "VMOVUPDrr")>;
+def: InstRW<[SKXWriteResGroup3], (instregex "VMOVUPSYrr")>;
+def: InstRW<[SKXWriteResGroup3], (instregex "VMOVUPSrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VPACKSSDWYrr")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VPACKSSDWZ128rr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup3], (instregex "VPACKSSDWZ256rr(b?)(k?)(z?)")>;
@@ -980,7 +980,7 @@ def SKXWriteResGroup6 : SchedWriteRes<[S
 }
 def: InstRW<[SKXWriteResGroup6], (instregex "FINCSTP")>;
 def: InstRW<[SKXWriteResGroup6], (instregex "FNOP")>;
-def: InstRW<[SKXWriteResGroup6], (instregex "MMX_MOVQ64rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup6], (instregex "MMX_MOVQ64rr")>;
 def: InstRW<[SKXWriteResGroup6], (instregex "MMX_PABSBrr64")>;
 def: InstRW<[SKXWriteResGroup6], (instregex "MMX_PABSDrr64")>;
 def: InstRW<[SKXWriteResGroup6], (instregex "MMX_PABSWrr64")>;
@@ -1006,8 +1006,8 @@ def SKXWriteResGroup7 : SchedWriteRes<[S
   let ResourceCycles = [1];
 }
 def: InstRW<[SKXWriteResGroup7], (instregex "ADC(16|32|64)ri")>;
-def: InstRW<[SKXWriteResGroup7], (instregex "ADC(16|32|64)rr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup7], (instregex "ADC8rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup7], (instregex "ADC(16|32|64)rr")>;
+def: InstRW<[SKXWriteResGroup7], (instregex "ADC8rr")>;
 def: InstRW<[SKXWriteResGroup7], (instregex "ADCX(32|64)rr")>;
 def: InstRW<[SKXWriteResGroup7], (instregex "ADOX(32|64)rr")>;
 def: InstRW<[SKXWriteResGroup7], (instregex "BT(16|32|64)ri8")>;
@@ -1033,8 +1033,8 @@ def: InstRW<[SKXWriteResGroup7], (instre
 def: InstRW<[SKXWriteResGroup7], (instregex "SAR8ri")>;
 def: InstRW<[SKXWriteResGroup7], (instregex "SARX(32|64)rr")>;
 def: InstRW<[SKXWriteResGroup7], (instregex "SBB(16|32|64)ri")>;
-def: InstRW<[SKXWriteResGroup7], (instregex "SBB(16|32|64)rr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup7], (instregex "SBB8rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup7], (instregex "SBB(16|32|64)rr")>;
+def: InstRW<[SKXWriteResGroup7], (instregex "SBB8rr")>;
 def: InstRW<[SKXWriteResGroup7], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)r")>;
 def: InstRW<[SKXWriteResGroup7], (instregex "SHL(16|32|64)r1")>;
 def: InstRW<[SKXWriteResGroup7], (instregex "SHL(16|32|64)ri")>;
@@ -1072,12 +1072,12 @@ def: InstRW<[SKXWriteResGroup9], (instre
 def: InstRW<[SKXWriteResGroup9], (instregex "BLENDPDrri")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "BLENDPSrri")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "MMX_MOVD64from64rr")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "MOVAPDrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "MOVAPSrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "MOVDQArr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "MOVDQUrr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "MOVAPDrr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "MOVAPSrr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "MOVDQArr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "MOVDQUrr")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "MOVPQI2QIrr")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "MOVSSrr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "MOVSSrr")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "ORPDrr")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "ORPSrr")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "PADDBrr")>;
@@ -1122,47 +1122,47 @@ def: InstRW<[SKXWriteResGroup9], (instre
 def: InstRW<[SKXWriteResGroup9], (instregex "VBLENDPDrri")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VBLENDPSYrri")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VBLENDPSrri")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDYrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDZ128rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDZ256rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDZrr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPSYrr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDYrr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDZ128rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDZ256rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDZrr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPDrr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPSYrr")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPSZ128rr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPSZ256rr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPSZrr(b?)(k?)(z?)")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPSrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA32Z128rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA32Z256rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA32Zrr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA64Z128rr(b?)(k?)(z?)(_REV)?")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVAPSrr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA32Z128rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA32Z256rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA32Zrr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA64Z128rr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA64Z256rr(b?)(k?)(z?)")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA64Zrr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQAYrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQArr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU16Z128rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU16Z256rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU16Zrr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU32Z128rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU32Z256rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU32Zrr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU64Z128rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU64Z256rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU64Zrr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU8Z128rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU8Z256rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU8Zrr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQUYrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQUrr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQA64Zrr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQAYrr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQArr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU16Z128rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU16Z256rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU16Zrr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU32Z128rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU32Z256rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU32Zrr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU64Z128rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU64Z256rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU64Zrr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU8Z128rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU8Z256rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQU8Zrr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQUYrr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVDQUrr")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VMOVPQI(2Q|Lo2PQ)IZrr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VMOVPQI2QIrr")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVSSrr(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPDZ128rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPDZ256rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPDZrr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPSZ128rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPSZ256rr(b?)(k?)(z?)(_REV)?")>;
-def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPSZrr(b?)(k?)(z?)(_REV)?")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVSSrr")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPDZ128rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPDZ256rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPDZrr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPSZ128rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPSZ256rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup9], (instregex "VMOVUPSZrr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VMOVZPQILo2PQIrr")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VORPDYrr")>;
 def: InstRW<[SKXWriteResGroup9], (instregex "VORPDZ128rr(b?)(k?)(z?)")>;
@@ -1284,32 +1284,32 @@ def SKXWriteResGroup10 : SchedWriteRes<[
   let ResourceCycles = [1];
 }
 def: InstRW<[SKXWriteResGroup10], (instregex "ADD(16|32|64)ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "ADD(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "ADD(16|32|64)rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "ADD8i8")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "ADD8ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "ADD8rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "ADD8rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "AND(16|32|64)ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "AND(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "AND(16|32|64)rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "AND8i8")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "AND8ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "AND8rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "AND8rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "CBW")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "CLC")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "CMC")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "CMP(16|32|64)ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "CMP(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "CMP(16|32|64)rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "CMP8i8")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "CMP8ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "CMP8rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "CMP8rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "CWDE")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "DEC(16|32|64)r")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "DEC8r")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "INC(16|32|64)r")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "INC8r")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "LAHF")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "MOV(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "MOV(16|32|64)rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "MOV8ri(_alt)?")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "MOV8rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "MOV8rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "MOVSX(16|32|64)rr16")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "MOVSX(16|32|64)rr32")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "MOVSX(16|32|64)rr8")>;
@@ -1321,10 +1321,10 @@ def: InstRW<[SKXWriteResGroup10], (instr
 def: InstRW<[SKXWriteResGroup10], (instregex "NOT(16|32|64)r")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "NOT8r")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "OR(16|32|64)ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "OR(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "OR(16|32|64)rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "OR8i8")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "OR8ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "OR8rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "OR8rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "SAHF")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "SGDT64m")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "SIDT64m")>;
@@ -1333,10 +1333,10 @@ def: InstRW<[SKXWriteResGroup10], (instr
 def: InstRW<[SKXWriteResGroup10], (instregex "STC")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "STRm")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "SUB(16|32|64)ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "SUB(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "SUB(16|32|64)rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "SUB8i8")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "SUB8ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "SUB8rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "SUB8rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "SYSCALL")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "TEST(16|32|64)rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "TEST8i8")>;
@@ -1344,10 +1344,10 @@ def: InstRW<[SKXWriteResGroup10], (instr
 def: InstRW<[SKXWriteResGroup10], (instregex "TEST8rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "XCHG(16|32|64)rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "XOR(16|32|64)ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "XOR(16|32|64)rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "XOR(16|32|64)rr")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "XOR8i8")>;
 def: InstRW<[SKXWriteResGroup10], (instregex "XOR8ri")>;
-def: InstRW<[SKXWriteResGroup10], (instregex "XOR8rr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup10], (instregex "XOR8rr")>;
 
 def SKXWriteResGroup11 : SchedWriteRes<[SKXPort4,SKXPort237]> {
   let Latency = 1;
@@ -2112,7 +2112,7 @@ def: InstRW<[SKXWriteResGroup33], (instr
 def: InstRW<[SKXWriteResGroup33], (instregex "VPEXTRDrr")>;
 def: InstRW<[SKXWriteResGroup33], (instregex "VPEXTRQZrr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup33], (instregex "VPEXTRQrr")>;
-def: InstRW<[SKXWriteResGroup33], (instregex "VPEXTRWZrr(_REV)?")>;
+def: InstRW<[SKXWriteResGroup33], (instregex "VPEXTRWZrr")>;
 def: InstRW<[SKXWriteResGroup33], (instregex "VPEXTRWri")>;
 def: InstRW<[SKXWriteResGroup33], (instregex "VPEXTRWrr_REV")>;
 def: InstRW<[SKXWriteResGroup33], (instregex "VPTESTYrr")>;

Modified: llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td?rev=323351&r1=323350&r2=323351&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td Wed Jan 24 09:58:42 2018
@@ -339,8 +339,7 @@ def : InstRW<[WriteALULd], (instregex "(
 // r,r/i.
 def : InstRW<[WriteALU], (instregex "(ADC|SBB)(8|16|32|64)r(r|i)",
                           "(ADC|SBB)(16|32|64)ri8",
-                          "(ADC|SBB)64ri32",
-                          "(ADC|SBB)(8|16|32|64)rr_REV")>;
+                          "(ADC|SBB)64ri32")>;
 
 // r,m.
 def : InstRW<[WriteALULd, ReadAfterLd],
@@ -919,11 +918,10 @@ def : InstRW<[ZnWriteFPU], (instregex "M
 
 // (V)MOVDQA/U.
 // x <- x.
-def : InstRW<[ZnWriteFPU], (instregex "MOVDQ(A|U)rr", "VMOVDQ(A|U)rr",
-                           "MOVDQ(A|U)rr_REV", "VMOVDQ(A|U)rr_REV")>;
+def : InstRW<[ZnWriteFPU], (instregex "MOVDQ(A|U)rr", "VMOVDQ(A|U)rr")>;
 
 // y <- y.
-def : InstRW<[ZnWriteFPUY], (instregex "VMOVDQ(A|U)Yrr", "VMOVDQ(A|U)Yrr_REV")>;
+def : InstRW<[ZnWriteFPUY], (instregex "VMOVDQ(A|U)Yrr")>;
 
 // MOVDQ2Q.
 def : InstRW<[ZnWriteFPU], (instregex "MMX_MOVDQ2Qrr")>;
@@ -1621,8 +1619,8 @@ def : InstRW<[ZnWriteFMADDr],
     (instregex
     "VF(N?)M(ADD|SUB|ADDSUB|SUBADD)P(S|D)(213|132|231)(Y?)r",
     "VF(N?)M(ADD|SUB)(132|231|213)S(S|D)r",
-    "VF(N?)M(ADD|SUB)S(S|D)4rr(_REV|_Int)?",
-    "VF(N?)M(ADD|SUB)P(S|D)4(Y?)rr(_REV)?")>;
+    "VF(N?)M(ADD|SUB)S(S|D)4rr(_Int)?",
+    "VF(N?)M(ADD|SUB)P(S|D)4(Y?)rr")>;
 
 // v,v,m.
 def ZnWriteFMADDm : SchedWriteRes<[ZnAGU, ZnFPU03]> {




More information about the llvm-commits mailing list