[PATCH] D40602: [X86] Add MC level selection support for SHLD (64-bit only)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

The BDVER tests are changing despite not having a scheduler model attached - I'm not sure we want that, if there isn't scheduler model attached to a cpu we shouldn't use defaults as that's precisely what the feature flags are fighting against.


https://reviews.llvm.org/D40602